/freebsd-13-stable/sys/contrib/ncsw/inc/Peripherals/ |
H A D | mii_acc_ext.h | 46 @Param[in] phyAddr - PHY address (0-31). 53 uint8_t phyAddr, 64 @Param[in] phyAddr - PHY address (0-31). 71 uint8_t phyAddr,
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H A D | fm_mac_ext.h | 813 @Param[in] phyAddr - Phy Address on the MII bus 821 t_Error FM_MAC_MII_WritePhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data); 829 @Param[in] phyAddr - Phy Address on the MII bus 837 t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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/freebsd-13-stable/sys/contrib/ncsw/Peripherals/FM/MAC/ |
H A D | dtsec_mii_acc.h | 39 t_Error DTSEC_MII_WritePhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t data); 40 t_Error DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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H A D | memac_mii_acc.c | 46 uint8_t phyAddr, 56 phyAddr, 64 uint8_t phyAddr, 74 phyAddr, 45 MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data) argument 63 MEMAC_MII_ReadPhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
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H A D | dtsec_mii_acc.c | 49 uint8_t phyAddr, 64 err = (t_Error)fman_dtsec_mii_write_reg(miiregs, phyAddr, reg, data, dtsec_freq); 71 uint8_t phyAddr, 86 err = fman_dtsec_mii_read_reg(miiregs, phyAddr, reg, p_Data, dtsec_freq); 90 ("Read wrong data (0xffff): phyAddr 0x%x, reg 0x%x", 91 phyAddr, reg)); 48 DTSEC_MII_WritePhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t data) argument 70 DTSEC_MII_ReadPhyReg(t_Handle h_Dtsec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
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H A D | tgec_mii_acc.c | 46 uint8_t phyAddr, 69 WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr); 90 uint8_t phyAddr, 113 WRITE_UINT32(p_MiiAccess->mdio_command, phyAddr); 122 WRITE_UINT32(p_MiiAccess->mdio_command, (uint32_t)(phyAddr | MIIMCOM_READ_CYCLE)); 135 ("Read Error: phyAddr 0x%x, dev 0x%x, reg 0x%x, cfgStatusReg 0x%x", 136 ((phyAddr & 0xe0)>>5), (phyAddr & 0x1f), reg, cfgStatusReg)); 45 TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data) argument 89 TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument
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H A D | memac.h | 106 t_Error MEMAC_MII_WritePhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t data); 107 t_Error MEMAC_MII_ReadPhyReg(t_Handle h_Memac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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H A D | tgec.h | 147 t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data); 148 t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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H A D | memac.c | 83 static void SetupSgmiiInternalPhy(t_Memac *p_Memac, uint8_t phyAddr) argument 99 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16); 103 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16); 116 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x13, 0x0007); 117 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x12, 0xa120); 121 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x0, tmpReg16); 129 static void SetupSgmiiInternalPhyBaseX(t_Memac *p_Memac, uint8_t phyAddr) argument 142 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16); 146 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x4, tmpReg16); 159 MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 818 uint8_t i, phyAddr; local [all...] |
H A D | fm_mac.h | 128 t_Error (*f_FM_MAC_MII_WritePhyReg)(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data); 129 t_Error (*f_FM_MAC_MII_ReadPhyReg)(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
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H A D | fm_mac.c | 605 t_Error FM_MAC_MII_WritePhyReg (t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t data) argument 612 return p_FmMacControllerDriver->f_FM_MAC_MII_WritePhyReg(h_FmMac, phyAddr, reg, data); 619 t_Error FM_MAC_MII_ReadPhyReg(t_Handle h_FmMac, uint8_t phyAddr, uint8_t reg, uint16_t *p_Data) argument 626 return p_FmMacControllerDriver->f_FM_MAC_MII_ReadPhyReg(h_FmMac, phyAddr, reg, p_Data);
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/freebsd-13-stable/sys/contrib/ncsw/Peripherals/QM/ |
H A D | qm.c | 173 uint64_t phyAddr; local 175 phyAddr = XX_VirtToPhys(UINT_TO_PTR(p_Qm->p_QmDriverParams->swPortalsBaseAddress)); 177 if (phyAddr & 0x00000000001fffffLL) 764 uint64_t phyAddr; local 771 phyAddr = XX_VirtToPhys(UINT_TO_PTR(p_QmDriverParams->swPortalsBaseAddress)); 772 WRITE_UINT32(p_Qm->p_QmRegs->qcsp_bare, ((uint32_t)(phyAddr >> 32) & 0x000000ff)); 773 WRITE_UINT32(p_Qm->p_QmRegs->qcsp_bar, (uint32_t)phyAddr); 797 phyAddr = XX_VirtToPhys(p_Qm->p_FqdBase); 798 WRITE_UINT32(p_Qm->p_QmRegs->fqd_bare, ((uint32_t)(phyAddr >> 32) & 0x000000ff)); 799 WRITE_UINT32(p_Qm->p_QmRegs->fqd_bar, (uint32_t)phyAddr); [all...] |
/freebsd-13-stable/sys/contrib/ncsw/Peripherals/BM/ |
H A D | bm.c | 527 uint64_t phyAddr; local 552 phyAddr = XX_VirtToPhys(p_Bm->p_FbprBase); 553 WRITE_UINT32(p_Bm->p_BmRegs->fbpr_bare, ((uint32_t)(phyAddr >> 32) & 0xffff)); 554 WRITE_UINT32(p_Bm->p_BmRegs->fbpr_bar, (uint32_t)phyAddr);
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/freebsd-13-stable/sys/dev/ath/ath_hal/ |
H A D | ah.h | 1340 struct ath_desc *, uint32_t phyAddr,
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