1/*
2 * Copyright 2008-2012 Freescale Semiconductor Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *     * Redistributions of source code must retain the above copyright
7 *       notice, this list of conditions and the following disclaimer.
8 *     * Redistributions in binary form must reproduce the above copyright
9 *       notice, this list of conditions and the following disclaimer in the
10 *       documentation and/or other materials provided with the distribution.
11 *     * Neither the name of Freescale Semiconductor nor the
12 *       names of its contributors may be used to endorse or promote products
13 *       derived from this software without specific prior written permission.
14 *
15 *
16 * ALTERNATIVELY, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") as published by the Free Software
18 * Foundation, either version 2 of that License or (at your option) any
19 * later version.
20 *
21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33
34/******************************************************************************
35 @File          tgec.h
36
37 @Description   FM 10G MAC ...
38*//***************************************************************************/
39#ifndef __TGEC_H
40#define __TGEC_H
41
42#include "std_ext.h"
43#include "error_ext.h"
44#include "list_ext.h"
45#include "enet_ext.h"
46
47#include "tgec_mii_acc.h"
48#include "fm_mac.h"
49
50
51#define DEFAULT_exceptions                        \
52    ((uint32_t)(TGEC_IMASK_MDIO_SCAN_EVENT     |  \
53                TGEC_IMASK_REM_FAULT           |  \
54                TGEC_IMASK_LOC_FAULT           |  \
55                TGEC_IMASK_TX_ECC_ER           |  \
56                TGEC_IMASK_TX_FIFO_UNFL        |  \
57                TGEC_IMASK_TX_FIFO_OVFL        |  \
58                TGEC_IMASK_TX_ER               |  \
59                TGEC_IMASK_RX_FIFO_OVFL        |  \
60                TGEC_IMASK_RX_ECC_ER           |  \
61                TGEC_IMASK_RX_JAB_FRM          |  \
62                TGEC_IMASK_RX_OVRSZ_FRM        |  \
63                TGEC_IMASK_RX_RUNT_FRM         |  \
64                TGEC_IMASK_RX_FRAG_FRM         |  \
65                TGEC_IMASK_RX_CRC_ER           |  \
66                TGEC_IMASK_RX_ALIGN_ER))
67
68#define GET_EXCEPTION_FLAG(bitMask, exception)      switch (exception){ \
69    case e_FM_MAC_EX_10G_MDIO_SCAN_EVENTMDIO:                           \
70        bitMask = TGEC_IMASK_MDIO_SCAN_EVENT    ; break;                \
71    case e_FM_MAC_EX_10G_MDIO_CMD_CMPL:                                 \
72        bitMask = TGEC_IMASK_MDIO_CMD_CMPL      ; break;                \
73    case e_FM_MAC_EX_10G_REM_FAULT:                                     \
74        bitMask = TGEC_IMASK_REM_FAULT          ; break;                \
75    case e_FM_MAC_EX_10G_LOC_FAULT:                                     \
76        bitMask = TGEC_IMASK_LOC_FAULT          ; break;                \
77    case e_FM_MAC_EX_10G_1TX_ECC_ER:                                    \
78        bitMask = TGEC_IMASK_TX_ECC_ER         ; break;                 \
79    case e_FM_MAC_EX_10G_TX_FIFO_UNFL:                                  \
80        bitMask = TGEC_IMASK_TX_FIFO_UNFL       ; break;                \
81    case e_FM_MAC_EX_10G_TX_FIFO_OVFL:                                  \
82        bitMask = TGEC_IMASK_TX_FIFO_OVFL       ; break;                \
83    case e_FM_MAC_EX_10G_TX_ER:                                         \
84        bitMask = TGEC_IMASK_TX_ER              ; break;                \
85    case e_FM_MAC_EX_10G_RX_FIFO_OVFL:                                  \
86        bitMask = TGEC_IMASK_RX_FIFO_OVFL       ; break;                \
87    case e_FM_MAC_EX_10G_RX_ECC_ER:                                     \
88        bitMask = TGEC_IMASK_RX_ECC_ER          ; break;                \
89    case e_FM_MAC_EX_10G_RX_JAB_FRM:                                    \
90        bitMask = TGEC_IMASK_RX_JAB_FRM         ; break;                \
91    case e_FM_MAC_EX_10G_RX_OVRSZ_FRM:                                  \
92        bitMask = TGEC_IMASK_RX_OVRSZ_FRM       ; break;                \
93    case e_FM_MAC_EX_10G_RX_RUNT_FRM:                                   \
94        bitMask = TGEC_IMASK_RX_RUNT_FRM        ; break;                \
95    case e_FM_MAC_EX_10G_RX_FRAG_FRM:                                   \
96        bitMask = TGEC_IMASK_RX_FRAG_FRM        ; break;                \
97    case e_FM_MAC_EX_10G_RX_LEN_ER:                                     \
98        bitMask = TGEC_IMASK_RX_LEN_ER          ; break;                \
99    case e_FM_MAC_EX_10G_RX_CRC_ER:                                     \
100        bitMask = TGEC_IMASK_RX_CRC_ER          ; break;                \
101    case e_FM_MAC_EX_10G_RX_ALIGN_ER:                                   \
102        bitMask = TGEC_IMASK_RX_ALIGN_ER        ; break;                \
103    default: bitMask = 0;break;}
104
105#define MAX_PACKET_ALIGNMENT        31
106#define MAX_INTER_PACKET_GAP        0x7f
107#define MAX_INTER_PALTERNATE_BEB    0x0f
108#define MAX_RETRANSMISSION          0x0f
109#define MAX_COLLISION_WINDOW        0x03ff
110
111#define TGEC_NUM_OF_PADDRS          1                   /* number of pattern match registers (entries) */
112
113#define GROUP_ADDRESS               0x0000010000000000LL /* Group address bit indication */
114
115#define HASH_TABLE_SIZE             512                 /* Hash table size (= 32 bits * 8 regs) */
116
117#define TGEC_TO_MII_OFFSET          0x1030              /* Offset from the MEM map to the MDIO mem map */
118
119/* 10-gigabit Ethernet MAC Controller ID (10GEC_ID) */
120#define TGEC_ID_ID                  0xffff0000
121#define TGEC_ID_MAC_VERSION         0x0000FF00
122#define TGEC_ID_MAC_REV             0x000000ff
123
124
125typedef struct {
126    t_FmMacControllerDriver     fmMacControllerDriver;              /**< Upper Mac control block */
127    t_Handle                    h_App;                              /**< Handle to the upper layer application  */
128    struct tgec_regs            *p_MemMap;                          /**< pointer to 10G memory mapped registers. */
129    t_TgecMiiAccessMemMap       *p_MiiMemMap;                       /**< pointer to MII memory mapped registers.          */
130    uint64_t                    addr;                               /**< MAC address of device; */
131    e_EnetMode                  enetMode;                           /**< Ethernet physical interface  */
132    t_FmMacExceptionCallback    *f_Exception;
133    int                         mdioIrq;
134    t_FmMacExceptionCallback    *f_Event;
135    bool                        indAddrRegUsed[TGEC_NUM_OF_PADDRS]; /**< Whether a particular individual address recognition register is being used */
136    uint64_t                    paddr[TGEC_NUM_OF_PADDRS];          /**< MAC address for particular individual address recognition register */
137    uint8_t                     numOfIndAddrInRegs;                 /**< Number of individual addresses in registers for this station. */
138    t_EthHash                   *p_MulticastAddrHash;               /**< pointer to driver's global address hash table  */
139    t_EthHash                   *p_UnicastAddrHash;                 /**< pointer to driver's individual address hash table  */
140    bool                        debugMode;
141    uint8_t                     macId;
142    uint32_t                    exceptions;
143    struct tgec_cfg             *p_TgecDriverParam;
144} t_Tgec;
145
146
147t_Error TGEC_MII_WritePhyReg(t_Handle h_Tgec, uint8_t phyAddr, uint8_t reg, uint16_t data);
148t_Error TGEC_MII_ReadPhyReg(t_Handle h_Tgec,  uint8_t phyAddr, uint8_t reg, uint16_t *p_Data);
149
150
151#endif /* __TGEC_H */
152