Searched refs:isPredicable (Results 1 - 25 of 30) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenInstruction.h152 bool isPredicable; member in class:llvm::CGIOperandList
256 bool isPredicable : 1;
H A DCodeGenInstruction.cpp28 isPredicable = false;
109 isPredicable = true;
388 isPredicable = !R->getValueAsBit("isUnpredicable") && (
389 Operands.isPredicable || R->getValueAsBit("isPredicable"));
H A DInstrDocsEmitter.cpp118 FLAG(isPredicable)
H A DInstrInfoEmitter.cpp756 if (Inst.isPredicable) OS << "|(1ULL<<MCID::Predicable)";
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h99 /// operand that controls an isPredicable() instruction.
321 bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); } function in class:llvm::MCInstrDesc
614 if (isPredicable()) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp806 if (!NewMCID.isPredicable())
810 SkipPred = !NewMCID.isPredicable();
899 if (!NewMCID.isPredicable())
903 SkipPred = !NewMCID.isPredicable();
968 if (!MCID.isPredicable() && NewMCID.isPredicable())
H A DThumbRegisterInfo.cpp561 if (MI.isPredicable())
H A DARMConstantIslandPass.cpp581 MI->getOperand(NumOps - (MI->isPredicable() ? 2 : 1));
2130 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1);
2324 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1);
H A DARMBaseInstrInfo.h177 bool isPredicable(const MachineInstr &MI) const override;
H A DARMBaseInstrInfo.cpp677 /// isPredicable - Return true if the specified instruction can be predicated.
680 bool ARMBaseInstrInfo::isPredicable(const MachineInstr &MI) const { function in class:ARMBaseInstrInfo
681 if (!MI.isPredicable())
2244 if (!isPredicable(*MI))
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp219 bool isPredicable(MachineInstr *MI);
722 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { function in class:HexagonExpandCondsets
723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI))
960 if (!DefI || !isPredicable(DefI))
1227 if (!RDef || !HII->isPredicable(*RDef)) {
1238 if (!RDef || !HII->isPredicable(*RDef)) {
H A DHexagonEarlyIfConv.cpp482 if (!HII->isPredicable(*Def1) || !HII->isPredicable(*Def3))
662 // HexagonInstrInfo::isPredicable will consider these stores are non-
680 // TargetInstrInfo::isPredicable takes a non-const pointer.
681 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI));
H A DHexagonInstrInfo.h247 bool isPredicable(const MachineInstr &MI) const override;
H A DHexagonInstrInfo.cpp1593 assert (isPredicable(MI) && "Expected predicable instruction");
1669 bool HexagonInstrInfo::isPredicable(const MachineInstr &MI) const { function in class:HexagonInstrInfo
1670 if (!MI.getDesc().isPredicable())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h182 bool isPredicable(const MachineInstr &MI) const override;
H A DR600InstrInfo.cpp877 bool R600InstrInfo::isPredicable(const MachineInstr &MI) const {
895 return TargetInstrInfo::isPredicable(MI);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h247 bool isPredicable(const MachineInstr &MI) const override;
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1366 virtual bool isPredicable(const MachineInstr &MI) const { function in class:llvm::TargetInstrInfo
1367 return MI.getDesc().isPredicable();
H A DMachineInstr.h822 bool isPredicable(QueryType Type = AllInBundle) const {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp381 if (!(MI.mayLoadOrStore() && !MI.isPredicable() &&
H A DTargetInstrInfo.cpp317 if (!MI.isPredicable())
330 if (!MI.isPredicable())
H A DMachineSink.cpp781 if (!(MI.mayLoad() && !MI.isPredicable()))
H A DEarlyIfConversion.cpp326 if (!TII->isPredicable(*I) || TII->isPredicated(*I)) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp467 if (!MI->isPredicable())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp6876 bool isPredicable = local
6878 size_t NumPredOps = isPredicable ? 1 : 0;
7507 if (!MCID.isPredicable())
7523 } else if (isThumbTwo() && MCID.isPredicable() &&
7529 } else if (!isThumb() && !useImplicitITARM() && MCID.isPredicable() &&
7533 } else if (!MCID.isPredicable()) {
10676 if (MCID.isPredicable()) {
10700 if (MCID.isPredicable()) {
10727 if (MCID.isPredicable()) {

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