/freebsd-13-stable/contrib/llvm-project/llvm/lib/Support/Unix/ |
H A D | Unix.h | 82 inline std::chrono::microseconds toDuration(const struct timeval &TV) { argument 83 return std::chrono::seconds(TV.tv_sec) + 84 std::chrono::microseconds(TV.tv_usec);
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/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
H A D | TrustNonnullChecker.cpp | 188 ConditionTruthVal TV = C.getState()->isNonNull(Receiver); local 189 if (TV.isConstrainedTrue())
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/freebsd-13-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | TemplateBase.h | 127 struct TV { struct in class:clang::TemplateArgument 136 struct TV TypeOrValue;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 1508 // and if so, get the value of it in TV. That value will then need to be 1510 int64_t TV; 1526 if (!checkForImmediate(DI->getOperand(1), TV)) 1539 TV = V2 | (static_cast<uint64_t>(V1) << 32); 1551 TV = V1 | (V3 << 32); 1553 TV = V3 | (V1 << 32); 1567 Val = TV & 0xFFFFFFFFULL; 1570 Val = (TV >> 32) & 0xFFFFFFFFULL; 1573 Val = TV;
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H A D | HexagonBitTracker.cpp | 863 BT::BitValue TV = R1[W1-1]; 864 if (TV.is(0) || TV.is(1)) 865 return rr0(eCLB(R1, TV, 32), Outputs); 953 bool TV = (Opc == S2_tstbit_i); 954 BT::BitValue F = V.is(TV) ? BT::BitValue::One : BT::BitValue::Zero;
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H A D | HexagonLoopIdiomRecognition.cpp | 1189 Value *TV = UseI->getOperand(1), *FV = UseI->getOperand(2); local 1190 if (Early.count(TV) || Early.count(FV)) { 1191 if (Late.count(TV) || Late.count(FV)) 1194 } else if (Late.count(TV) || Late.count(FV)) { 1195 if (Early.count(TV) || Early.count(FV))
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H A D | HexagonISelLoweringHVX.cpp | 1624 SDValue TV = DAG.getValueType(Ty); local 1625 return std::make_pair(TV, TV);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 88 // %A = icmp eq %TV, %FV 91 // %D = select %C, %TV, %FV 95 // %A = icmp ne %TV, %FV 98 // %D = select %C, %TV, %FV 100 // %TV 410 Value *TV; local 413 TV = SimplifyBinOp(Opcode, SI->getTrueValue(), RHS, Q, MaxRecurse); 416 TV = SimplifyBinOp(Opcode, LHS, SI->getTrueValue(), Q, MaxRecurse); 422 if (TV == FV) 423 return TV; 487 Value *TV = SI->getTrueValue(); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstructionCombining.cpp | 891 Value *TV = SI->getTrueValue(); 893 if (!(isa<Constant>(TV) || isa<Constant>(FV))) 948 if ((areLooselyEqual(TV, Op0) && areLooselyEqual(FV, Op1)) || 949 (areLooselyEqual(FV, Op0) && areLooselyEqual(TV, Op1))) 954 Value *NewTV = foldOperationIntoSelectOperand(Op, TV, Builder);
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H A D | InstCombineAddSub.cpp | 1369 Value *TV = SI->getTrueValue(); local 1375 if (match(FV, m_Zero()) && match(TV, m_Sub(m_Value(N), m_Specific(A)))) 1379 if (match(TV, m_Zero()) && match(FV, m_Sub(m_Value(N), m_Specific(A))))
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 8097 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3); local 8103 if (Subtarget.hasP9Vector() && LHS == TV && RHS == FV) { 8131 std::swap(TV, FV); 8136 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); 8143 std::swap(TV, FV); // fsel is natively setge, swap operands for setlt 8149 return DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); 8152 std::swap(TV, FV); // fsel is natively setge, swap operands for setlt 8159 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), TV, FV); 8166 std::swap(TV, FV); 8172 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, F [all...] |
/freebsd-13-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaChecking.cpp | 2185 unsigned TV = 0; local 2202 TV = Result.getLimitedValue(64); 2203 if ((TV > 63) || (mask & (1ULL << TV)) == 0) 2222 getNeonEltType(NeonTypeFlags(TV), Context, IsPolyUnsigned, IsInt64Long);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/MCParser/ |
H A D | AsmParser.cpp | 1166 if (auto TV = dyn_cast<MCTargetExpr>(V)) 1167 DoInline = TV->inlineAssignedExpr();
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H A D | MasmParser.cpp | 1429 if (auto TV = dyn_cast<MCTargetExpr>(V)) 1430 DoInline = TV->inlineAssignedExpr();
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 1342 Value *TV = SI.getTrueValue(); 1350 LoadInst *TL = IRB.CreateLoad(LI->getType(), TV,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 21232 auto *TV = dyn_cast<ConstantFPSDNode>(N2); 21235 if (!TV || !FV || !TLI.isTypeLegal(VT)) 21240 TLI.isFPImmLegal(TV->getValueAPF(), TV->getValueType(0), ForCodeSize) || 21246 if (!TV->hasOneUse() && !FV->hasOneUse()) 21250 const_cast<ConstantFP*>(TV->getConstantFPValue()) }; 21272 return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx,
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