/freebsd-13-stable/lib/libc/quad/TESTS/ |
H A D | Makefile | 5 MUL= mul.c ../muldi3.c macro 6 mul: ${MUL} 7 gcc -g -DSPARC_XXX ${MUL} -o ${.TARGET}
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/freebsd-13-stable/contrib/byacc/test/btyacc/ |
H A D | quote_calc.tab.h | 9 #define MUL 262 macro
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H A D | quote_calc2.tab.h | 9 #define MUL 262 macro
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/freebsd-13-stable/contrib/byacc/test/yacc/ |
H A D | quote_calc.tab.h | 6 #define MUL 262 macro
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H A D | quote_calc2.tab.h | 6 #define MUL 262 macro
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/freebsd-13-stable/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/donna/ |
H A D | poly1305_donna64.h | 8 #define MUL(out, x, y) out = ((uint128_t) x * y) macro 96 MUL(d0, h0, r0); 97 MUL(d, h1, s2); 99 MUL(d, h2, s1); 101 MUL(d1, h0, r1); 102 MUL(d, h1, r0); 104 MUL(d, h2, s2); 106 MUL(d2, h0, r2); 107 MUL(d, h1, r1); 109 MUL( [all...] |
/freebsd-13-stable/contrib/bearssl/src/hash/ |
H A D | ghash_ctmul.c | 65 uint64_t mul32tmp = MUL(x, y); \ 180 z0 = MUL(x0, y0) ^ MUL(x1, y3) ^ MUL(x2, y2) ^ MUL(x3, y1); 181 z1 = MUL(x0, y1) ^ MUL(x1, y0) ^ MUL(x2, y3) ^ MUL(x3, y2); 182 z2 = MUL(x [all...] |
/freebsd-13-stable/contrib/bearssl/src/int/ |
H A D | i32_montmul.c | 50 z = (uint64_t)d[v + 1] + MUL(xu, y[v + 1]) + r1; 53 z = (uint64_t)t + MUL(f, m[v + 1]) + r2;
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H A D | i32_fmont.c | 43 z = (uint64_t)x[v + 1] + MUL(f, m[v + 1]) + cc;
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H A D | i32_mulacc.c | 50 z = (uint64_t)d[1 + u + v] + MUL(f, a[1 + v]) + cc;
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H A D | i32_muladd.c | 113 zl = MUL(mw, q) + cc;
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 3814 // 32b Opcodes that can be combined with a MUL 3833 // 64b Opcodes that can be combined with a MUL 3892 // Opcodes that can be combined with a MUL 4383 /// F|MUL I=A,B,0 4393 /// the F|MUL. In the example above IdxMulOpd is 1. 4409 MachineInstr *MUL = MRI.getUniqueVRegDef(Root.getOperand(IdxMulOpd).getReg()); 4411 Register SrcReg0 = MUL->getOperand(1).getReg(); 4412 bool Src0IsKill = MUL->getOperand(1).isKill(); 4413 Register SrcReg1 = MUL->getOperand(2).getReg(); 4414 bool Src1IsKill = MUL [all...] |
/freebsd-13-stable/sys/contrib/openzfs/module/zfs/ |
H A D | vdev_raidz_math_impl.h | 282 MUL(mul, MUL_D); 286 MUL(mul, MUL_D); 876 MUL(mul[MUL_PQ_X], REC_PQ_X); 877 MUL(mul[MUL_PQ_Y], REC_PQ_Y); 1036 MUL(mul[MUL_PR_X], REC_PR_X); 1037 MUL(mul[MUL_PR_Y], REC_PR_Y); 1201 MUL(mul[MUL_QR_XQ], REC_QR_X); /* X = Q * xqm */ 1203 MUL(mul[MUL_QR_X], REC_QR_X); /* X = X * xm */ 1207 MUL(mul[MUL_QR_YQ], REC_QR_T); /* X = Q * xqm */ 1209 MUL(mu [all...] |
H A D | vdev_raidz_math_avx2.c | 286 #define MUL(c, r...) \ macro
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H A D | vdev_raidz_math_avx512bw.c | 284 #define MUL(c, r...) \ macro 303 * ZERO, COPY, and MUL operations are already 2x unrolled, which means that
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiTargetTransformInfo.h | 95 case ISD::MUL:
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXTargetTransformInfo.cpp | 131 case ISD::MUL:
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/freebsd-13-stable/contrib/byacc/test/ |
H A D | btyacc_demo.y | 22 enum Operator { ADD, SUB, MUL, MOD, DIV, DEREF }; 174 | expr '*' expr($e) { $$ = build_expr($1, MUL, $3); }
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 204 { ISD::MUL, MVT::v4i32, 11 }, // pmulld 205 { ISD::MUL, MVT::v8i16, 2 }, // pmullw 206 { ISD::MUL, MVT::v16i8, 14 }, // extend/pmullw/trunc sequence. 221 { ISD::MUL, MVT::v2i64, 17 }, 228 if (Args.size() == 2 && ISD == ISD::MUL && LT.second == MVT::v4i32) { 533 { ISD::MUL, MVT::v2i64, 1 }, 534 { ISD::MUL, MVT::v4i64, 1 }, 535 { ISD::MUL, MVT::v8i64, 1 } 548 { ISD::MUL, MVT::v64i8, 11 }, // extend/pmullw/trunc sequence. 549 { ISD::MUL, MV [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 225 MUL, enumerator in enum:llvm::ISD::NodeType
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGAddressAnalysis.cpp | 236 // MUL instruction. In this case Base is the actual BASE pointer. 240 if (Base->getOperand(1)->getOpcode() == ISD::MUL)
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H A D | TargetLowering.cpp | 2143 case ISD::MUL: 2803 case ISD::MUL: 4909 return DAG.getNode(ISD::MUL, dl, VT, Res, Factor); 4998 // FIXME: We should support doing a MUL in a wider type. 5013 Factor = DAG.getNode(ISD::MUL, dl, VT, N0, Factor); 5118 // FIXME: We should support doing a MUL in a wider type. 5233 // If MUL is unavailable, we cannot proceed in any case. 5234 if (!isOperationLegalOrCustom(ISD::MUL, VT)) 5372 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal); 5473 // If MUL i [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 582 if (Shl_0.getOpcode() == ISD::MUL) { 1621 case ISD::MUL: 1710 if (Opcode == ISD::MUL && 1777 if (Val.getOpcode() != ISD::MUL || 1805 if (Val.getOpcode() == ISD::MUL) { 1828 if (V.getOpcode() == ISD::MUL) { 1845 if (V.getOpcode() == ISD::MUL) { 1947 // SHL nodes will be converted to MUL nodes 1949 NOpcode = ISD::MUL; 1996 (Child.getOpcode() == ISD::MUL || Chil [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 600 if (OtherOp.getOpcode() == ISD::MUL) { 610 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) { 620 if (AddOp.getOperand(1).getOpcode() == ISD::MUL) { 638 if (N->getOperand(0).getOpcode() == ISD::MUL) { 641 } else if (N->getOperand(1).getOpcode() == ISD::MUL) { 686 RH = DAG.getNode(ISD::MUL, dl, MVT::i32, LL, RH); 687 LH = DAG.getNode(ISD::MUL, dl, MVT::i32, LH, RL);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 115 setOperationAction(ISD::MUL, MVT::v2i16, Legal); 189 setOperationAction(ISD::MUL, MVT::i64, Legal); 191 setOperationAction(ISD::MUL, MVT::i64, Custom); 211 setTargetDAGCombine(ISD::MUL); 232 setOperationAction(ISD::MUL, MVT::i32, Legal); 279 setOperationAction(ISD::MUL, MVT::i64, Legal); 337 setOperationAction(ISD::MUL, Ty, Legal); 458 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG); 1037 case ISD::MUL: 2002 DAG.getNode(ISD::MUL, SDLo [all...] |