Lines Matching refs:MUL
2143 case ISD::MUL:
2803 case ISD::MUL:
4909 return DAG.getNode(ISD::MUL, dl, VT, Res, Factor);
4998 // FIXME: We should support doing a MUL in a wider type.
5013 Factor = DAG.getNode(ISD::MUL, dl, VT, N0, Factor);
5118 // FIXME: We should support doing a MUL in a wider type.
5233 // If MUL is unavailable, we cannot proceed in any case.
5234 if (!isOperationLegalOrCustom(ISD::MUL, VT))
5372 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal);
5473 // If MUL is unavailable, we cannot proceed in any case.
5474 if (!isOperationLegalOrCustom(ISD::MUL, VT))
5614 SDValue Op0 = DAG.getNode(ISD::MUL, DL, VT, N, PVal);
5950 assert(Opcode == ISD::MUL || Opcode == ISD::UMUL_LOHI ||
5983 Lo = DAG.getNode(ISD::MUL, dl, HiLoVT, L, R);
6008 if (Opcode != ISD::MUL) {
6017 if (!VT.isVector() && Opcode == ISD::MUL && LHSSB > InnerBitSize &&
6020 // TODO non-MUL case?
6055 if (Opcode == ISD::MUL) {
6056 RH = DAG.getNode(ISD::MUL, dl, HiLoVT, LL, RH);
6057 LH = DAG.getNode(ISD::MUL, dl, HiLoVT, LH, RL);
6557 (Len != 8 && !isOperationLegalOrCustom(ISD::MUL, VT)) ||
6593 DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::MUL, dl, VT, Op, Mask01),
7193 Increment = DAG.getNode(ISD::MUL, DL, AddrVT, Increment, Scale);
7238 Index = DAG.getNode(ISD::MUL, dl, IdxVT, Index,
7412 if (isOperationLegalOrCustom(ISD::MUL, VT))
7413 return DAG.getNode(ISD::MUL, dl, VT, LHS, RHS);
7455 Lo = DAG.getNode(ISD::MUL, dl, VT, LHS, RHS);
7723 BottomHalf = DAG.getNode(ISD::MUL, dl, VT, LHS, RHS);
7732 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS);
7742 // We can fall back to a libcall with an illegal type for the MUL if we
7838 case ISD::VECREDUCE_MUL: BaseOpcode = ISD::MUL; break;
7903 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Divide, Divisor);