Searched refs:Latency (Results 1 - 25 of 32) sorted by relevance

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/freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp29 TempStream << "[1]: #uOps\n[2]: Latency\n[3]: RThroughput\n"
53 unsigned Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); local
55 Latency += MCSchedModel::getForwardingDelayCycles(
65 TempStream << Latency << " "; local
66 if (Latency < 10)
68 else if (Latency < 100)
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrItineraries.h156 unsigned Latency = 0, StartCycle = 0; local
159 Latency = std::max(Latency, StartCycle + IS->getCycles());
162 return Latency;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp183 int Latency = 0; local
186 Latency = std::max(Latency, IID.getOperandCycle(SCClass, OpIdx));
188 return Latency;
216 int16_t Latency = 0;
222 Latency = std::max(Latency, WLEntry->Cycles);
225 return Latency;
231 int Latency = getLatency(DC, Inst); local
234 if (Latency <
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/freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-xray/
H A Dxray-account.h47 void recordLatency(int32_t FuncId, uint64_t Latency) { argument
48 FunctionLatencies[FuncId].push_back(Latency);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp42 int Latency = 0; local
51 Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles));
53 return Latency;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp216 int Latency = MCSchedModel::computeInstrLatency(STI, SCDesc); local
218 ID.MaxLatency = Latency < 0 ? 100U : static_cast<unsigned>(Latency);
323 Write.Latency =
328 Write.Latency = ID.MaxLatency;
334 << ", Latency=" << Write.Latency
351 Write.Latency =
356 Write.Latency = ID.MaxLatency;
365 << ", Latency
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp93 SU->Latency = Old->Latency;
421 // Assign the Latency field of NodeSUnit using target-provided information.
503 unsigned OpLatency = isChain ? 1 : OpSU->Latency;
620 SU->Latency = 0;
626 SU->Latency = 1;
633 SU->Latency = HighLatencyCycles;
635 SU->Latency = 1;
641 SU->Latency = 0;
644 SU->Latency
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H A DScheduleDAGVLIW.cpp242 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
H A DScheduleDAGFast.cpp335 D.setLatency(LoadSU->Latency);
410 FromDep.setLatency(SU->Latency);
413 ToDep.setLatency(CopyFromSU->Latency);
H A DScheduleDAGRRList.cpp1116 D.setLatency(LoadSU->Latency);
1258 FromDep.setLatency(SU->Latency);
1261 ToDep.setLatency(CopyFromSU->Latency);
2516 if (left->Latency != right->Latency)
2517 return left->Latency > right->Latency ? 1 : -1;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp224 unsigned Latency = capLatency(WLEntry->Cycles); local
226 return Latency;
231 return Latency;
234 if (Advance > 0 && (unsigned)Advance > Latency) // unsigned wrap
236 return Latency - Advance;
H A DCriticalAntiDepBreaker.cpp464 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
472 << (Max->getDepth() + Max->Latency) << "\n");
H A DScheduleDAGInstrs.cpp546 unsigned Latency) {
549 Dep.setLatency(Latency);
581 // Assign the Latency field of SU using target-provided information.
582 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
878 if (SU->NumSuccs == 0 && SU->Latency > 1 && (HasVRegDef || MI.mayLoad())) {
880 Dep.setLatency(SU->Latency - 1);
545 addChainDependency(SUnit *SUa, SUnit *SUb, unsigned Latency) argument
H A DMachineScheduler.cpp1340 unsigned LiveOutDepth = DefSU->getDepth() + DefSU->Latency;
1360 unsigned LiveInHeight = SU->getHeight() + DefSU->Latency;
1882 /// Given a Count of resource usage and a Latency value, return true if a
1887 unsigned Latency, bool AfterSchedNode) {
1888 int ResCntFactor = (int)(Count - (Latency * LFactor));
2483 << (IsResourceLimited ? " - Resource" : " - Latency")
2602 << " Latency limited both directions.\n");
2639 unsigned Latency = 0; local
2659 Latency = Cand.SU->getDepth();
2662 Latency
1886 checkResourceLimit(unsigned LFactor, unsigned Count, unsigned Latency, bool AfterSchedNode) argument
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h94 /// Latency field of the predecessor, however advanced models may provide
96 unsigned Latency; member in class:llvm::SDep
114 Latency = 0;
118 Latency = 1;
124 : Dep(S, Order), Contents(), Latency(0) {
132 return overlaps(Other) && Latency == Other.Latency;
143 return Latency;
148 Latency = Lat;
273 unsigned short Latency variable
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H A DScheduleDAGInstrs.h207 unsigned Latency = 0);
210 void addChainDependencies(SUnit *SU, SUList &SUs, unsigned Latency) { argument
212 addChainDependency(SU, Entry, Latency);
H A DMachinePipeliner.h328 unsigned Latency = 0; member in class:llvm::NodeSet
335 Latency = 0;
350 Latency += SUnitLatency.second;
392 unsigned getLatency() { return Latency; }
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNILPSched.cpp157 if (left->Latency != right->Latency)
158 return left->Latency > right->Latency ? 1 : -1;
H A DSIMachineScheduler.h34 Latency, enumerator in enum:llvm::SIScheduleCandReason
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp445 int Latency = (InstrInfo.getOperandLatency(&InstrItins, *SrcI, local
450 Latency = std::max(Latency, 0);
452 I.setLatency(Latency);
/freebsd-13-stable/sys/contrib/dev/acpica/common/
H A Ddmtbinfo2.c512 {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0},
877 {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0},
1133 {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0},
1153 {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0},
1173 {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0},
1196 {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Comman
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/freebsd-13-stable/sys/contrib/dev/acpica/include/
H A Dactbl2.h685 UINT32 Latency; member in struct:acpi_lpit_native
1579 UINT32 Latency; member in struct:acpi_pcct_subspace
1599 UINT32 Latency; member in struct:acpi_pcct_hw_reduced
1619 UINT32 Latency; member in struct:acpi_pcct_hw_reduced_type2
1642 UINT32 Latency; member in struct:acpi_pcct_ext_pcc_master
1673 UINT32 Latency; member in struct:acpi_pcct_ext_pcc_slave
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CmovConversion.cpp465 unsigned Latency = TSchedModel.computeInstrLatency(&MI); local
466 DepthMap[&MI] = {MIDepth += Latency, MIDepthOpt += Latency};
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstruction.h43 unsigned Latency; member in struct:llvm::mca::WriteDescriptor
164 unsigned getLatency() const { return WD->Latency; }
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp4360 unsigned Latency = getInstrLatency(ItinData, DefMI); local
4366 if (Latency > 0 && Subtarget.isThumb2()) {
4370 --Latency;
4372 return Latency;
4386 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, UseMCID, local
4389 if (Latency < 0)
4390 return Latency;
4397 if (Adj >= 0 || (int)Latency > -Adj) {
4398 return Latency + Adj;
4401 return Latency;
4420 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx); local
4435 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, local
4692 unsigned Latency = 0; local
4721 unsigned Latency = ItinData->getStageLatency(Class); local
4764 unsigned Latency = local
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