Searched refs:DIV (Results 1 - 20 of 20) sorted by relevance

/freebsd-13-stable/contrib/byacc/test/btyacc/
H A Dquote_calc.tab.h11 #define DIV 264 macro
H A Dquote_calc2.tab.h11 #define DIV 264 macro
H A Dbtyacc_demo.tab.c136 enum Operator { ADD, SUB, MUL, MOD, DIV, DEREF }; enumerator in enum:Operator
2039 { yyval.expr = build_expr(yystack.l_mark[-3].expr, DIV, yystack.l_mark[0].expr); }
H A Dquote_calc.tab.c176 #define DIV 264 macro
339 "\"DIV\"","OP_MOD","\"MOD\"","OP_AND","\"AND\"","DIGIT","LETTER","UMINUS",
H A Dquote_calc2.tab.c176 #define DIV 264 macro
339 "\"DIV\"","OP_MOD","\"MOD\"","OP_AND","\"AND\"","DIGIT","LETTER","UMINUS",
353 "expr : expr \"DIV\" expr",
/freebsd-13-stable/contrib/byacc/test/yacc/
H A Dquote_calc.tab.h8 #define DIV 264 macro
H A Dquote_calc2.tab.h8 #define DIV 264 macro
H A Dquote_calc.tab.c156 #define DIV 264 macro
273 "\"DIV\"","OP_MOD","\"MOD\"","OP_AND","\"AND\"","DIGIT","LETTER","UMINUS",0,0,0,
H A Dquote_calc2.tab.c156 #define DIV 264 macro
273 "\"DIV\"","OP_MOD","\"MOD\"","OP_AND","\"AND\"","DIGIT","LETTER","UMINUS",0,0,0,
287 "expr : expr \"DIV\" expr",
/freebsd-13-stable/sys/mips/ingenic/
H A Djz4780_clock.c110 #define DIV(reg, shift, lg, bits, ce, st, bb) \ macro
169 DIV(JZ_CPCCR, 0, 0, 4, 22, -1, -1),
176 DIV(JZ_CPCCR, 4, 0, 4, -1, -1, -1),
183 DIV(JZ_CPCCR, 8, 0, 4, 21, -1, -1),
197 DIV(JZ_CPCCR, 12, 0, 4, 20, -1, -1),
204 DIV(JZ_CPCCR, 16, 0, 4, 20, -1, -1),
211 DIV(JZ_DDCDR, 0, 0, 4, 29, 28, 27),
218 DIV(JZ_VPUCDR, 0, 0, 4, 29, 28, 27),
225 DIV(JZ_I2SCDR, 0, 0, 8, 29, 28, 27),
239 DIV(JZ_LP0CD
[all...]
/freebsd-13-stable/sys/arm64/freescale/imx/
H A Dimx8mq_ccm.c148 DIV(IMX8MQ_ARM_PLL_REF_DIV, "arm_pll_ref_div", "arm_pll_ref_sel", 0x28, 5, 6),
149 DIV(IMX8MQ_GPU_PLL_REF_DIV, "gpu_pll_ref_div", "gpu_pll_ref_sel", 0x18, 5, 6),
150 DIV(IMX8MQ_VPU_PLL_REF_DIV, "vpu_pll_ref_div", "vpu_pll_ref_sel", 0x20, 5, 6),
151 DIV(IMX8MQ_AUDIO_PLL1_REF_DIV, "audio_pll1_ref_div", "audio_pll1_ref_sel", 0x0, 5, 6),
152 DIV(IMX8MQ_AUDIO_PLL2_REF_DIV, "audio_pll2_ref_div", "audio_pll2_ref_sel", 0x8, 5, 6),
153 DIV(IMX8MQ_VIDEO_PLL1_REF_DIV, "video_pll1_ref_div", "video_pll1_ref_sel", 0x10, 5, 6),
218 DIV(IMX8MQ_CLK_IPG_ROOT, "ipg_root", "ahb", 0x9080, 0, 1),
H A Dimx_ccm_clk.h197 #define DIV(_id, _name, _pname, _o, _shift, _width) \ macro
/freebsd-13-stable/contrib/byacc/test/
H A Dbtyacc_demo.y22 enum Operator { ADD, SUB, MUL, MOD, DIV, DEREF };
176 | expr '/' expr($e) { $$ = build_expr($1, DIV, $3); }
/freebsd-13-stable/sys/arm64/nvidia/tegra210/
H A Dtegra210_car.c96 #define DIV(_id, cname, plist, o, s, w, f) \ macro
259 DIV(0, "hclk_div", "sclk", CLK_SYSTEM_RATE, 4, 2, 0),
260 DIV(0, "pclk_div", "hclk", CLK_SYSTEM_RATE, 0, 2, 0),
/freebsd-13-stable/sys/arm/nvidia/tegra124/
H A Dtegra124_car.c95 #define DIV(_id, cname, plist, o, s, w, f) \ macro
278 DIV(0, "hclk_div", "sclk", CLK_SYSTEM_RATE, 4, 2, 0),
279 DIV(0, "pclk_div", "hclk", CLK_SYSTEM_RATE, 0, 2, 0),
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp1669 auto *DIV = dyn_cast<DILocalVariable>(MO.getMetadata());
1670 if (DIV && !DIV->getName().empty())
1671 OS << "!\"" << DIV->getName() << '\"';
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp1166 unsigned DIV = distance(DefI, DefV, RPO, M);
1167 if (DIV < Cutoff)
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1776 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(0), Zero}); local
1779 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV));
1957 SDValue DIV = DAG.getBuildVector(MVT::v2i32, DL, {DIV_Lo, DIV_Hi}); local
1958 DIV = DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV);
1959 Results.push_back(DIV);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1411 case Mips::DIV:
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2080 case Mips::DIV:

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