/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.cpp | 704 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, 710 LLT CmpValTy = getMRI()->getType(CmpVal); 725 .addUse(CmpVal) 732 Register CmpVal, Register NewVal, 737 LLT CmpValTy = getMRI()->getType(CmpVal); 750 .addUse(CmpVal) 703 buildAtomicCmpXchgWithSuccess( Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO) argument 731 buildAtomicCmpXchg(Register OldValRes, Register Addr, Register CmpVal, Register NewVal, MachineMemOperand &MMO) argument
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H A D | LegalizerHelper.cpp | 2432 Register CmpVal = MI.getOperand(3).getReg(); local 2434 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, 2436 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 201 Value *AlignedAddr, Value *CmpVal,
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H A D | RISCVISelLowering.cpp | 2957 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { 2962 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); 2971 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); 2955 emitMaskedAtomicCmpXchgIntrinsic( IRBuilder< &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2316 // a comparison of type Opcode between the AND result and CmpVal. 2321 uint64_t Mask, uint64_t CmpVal, 2340 if (CmpVal == 0) { 2346 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { 2352 if (EffectivelyUnsigned && CmpVal < Low) { 2360 if (CmpVal == Mask) { 2366 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { 2372 if (EffectivelyUnsigned && CmpVal > Mas 2320 getTestUnderMaskCond(unsigned BitSize, unsigned CCMask, uint64_t Mask, uint64_t CmpVal, unsigned ICmpType) argument 3986 SDValue CmpVal = Node->getOperand(2); local 7586 Register CmpVal = MRI.createVirtualRegister(RC); local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 1072 /// G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO`. 1075 /// \p CmpVal otherwise leaves it unchanged. Puts the original value from \p 1083 /// \pre \p OldValRes, \p CmpVal, and \p NewVal must be generic virtual 1089 Register Addr, Register CmpVal, Register NewVal, 1092 /// Build and insert `OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, 1096 /// \p CmpVal otherwise leaves it unchanged. Puts the original value from \p 1102 /// \pre \p OldValRes, \p CmpVal, and \p NewVal must be generic virtual 1107 Register CmpVal, Register NewVal,
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 2194 Register CmpVal = MI.getOperand(2).getReg(); 2201 LLT ValTy = MRI.getType(CmpVal); 2204 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); 3530 Register CmpVal; 3534 CmpVal = MI.getOperand(3 + OpOffset).getReg(); 3569 MIB.addReg(CmpVal);
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H A D | AMDGPUISelDAGToDAG.cpp | 2225 SDValue CmpVal = Mem->getOperand(2); local 2230 CmpVal, VAddr, SRsrc, SOffset, Offset, SLC, Mem->getChain() 2243 SDValue CmpVal = Mem->getOperand(2); local 2245 CmpVal, SRsrc, SOffset, Offset, SLC, Mem->getChain()
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 345 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; local 386 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal)));
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 4269 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); local 4270 return new ICmpInst(NewPred, Xor, Builder.getInt(CmpVal)); 5059 unsigned CmpVal = CI->countTrailingZeros(); local 5061 return new ICmpInst(NewPred, X, ConstantInt::get(X->getType(), CmpVal));
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
H A D | AddressSanitizer.cpp | 1688 Value *CmpVal = Constant::getNullValue(ShadowTy); local 1692 Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal);
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 1858 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { 1856 emitMaskedAtomicCmpXchgIntrinsic( IRBuilder< &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const argument
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1919 Register CmpVal = MI.getOperand(2).getReg(); local 1997 .addReg(CmpVal).addImm(MaskImm);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 5413 static bool isUndefOrEqual(int Val, int CmpVal) { 5414 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); [all...] |