/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1226 // Writeback not allowed if Rn is in the target list. 1319 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1369 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1465 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1484 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1504 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1511 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1525 if (writeback && (Rn == 15 || Rn == Rt)) 1570 unsigned Rn local 1615 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1805 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1836 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1858 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2089 unsigned Rn = fieldFromInstruction(Insn, 0, 4); local 2117 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2167 unsigned Rn = fieldFromInstruction(Val, 13, 4); local 2185 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 2283 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2608 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2878 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2925 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2973 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3008 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3149 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3231 unsigned Rn = fieldFromInstruction(Val, 0, 3); local 3246 unsigned Rn = fieldFromInstruction(Val, 0, 3); local 3278 unsigned Rn = fieldFromInstruction(Val, 6, 4); local 3307 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3388 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3472 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3552 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3658 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 3673 unsigned Rn = fieldFromInstruction(Val, 8, 4); local 3701 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 3748 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3808 unsigned Rn = fieldFromInstruction(Val, 13, 4); local 3934 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4160 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4182 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4205 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4230 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4258 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4283 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4308 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4375 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4441 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4508 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4572 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4642 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4706 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4787 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4933 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4970 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 5028 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 5173 unsigned Rn = fieldFromInstruction(Val, 16, 4); local [all...] |
/freebsd-11.0-release/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 974 // d = UInt(Rdm); n = UInt(Rn); m = UInt(Rdm); setflags = !InITBlock(); 987 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = FALSE; 1000 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == '1'); 1372 // if Rn == '1111' then SEE ADR; 1976 uint32_t Rn; // This function assumes Rn is the SP, but we should verify that. local 1985 Rn = Bits32 (opcode, 19, 16); 1987 if (Rn != 13) // 13 is the SP reg on ARM. Verify that Rn == SP. 1994 if (wback && ((Rn 2457 uint32_t Rn; // the base register which contains the address of the table of branch lengths local 2604 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 2656 uint32_t Rd, Rn; local 2722 uint32_t Rd, Rn, Rm; local 2805 uint32_t Rn; // the first operand local 2856 uint32_t Rn; // the first operand local 2925 uint32_t Rn; // the first operand local 2980 uint32_t Rn; // the first operand local 3366 uint32_t Rn; // the first operand register local 3620 addr_t Rn = ReadCoreReg (n, &success); local 3758 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 3869 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 3962 uint32_t Rn; // the base register local 4312 addr_t Rn = ReadCoreReg (n, &success); local 4463 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 4588 addr_t Rn = ReadCoreReg (n, &success); local 5361 uint32_t Rd, Rn; local 5431 uint32_t Rd, Rn, Rm; local 5582 uint32_t Rd, Rn; local 5656 uint32_t Rd, Rn, Rm; local 5747 uint32_t Rd, Rn; local 5819 uint32_t Rd, Rn, Rm; local 6333 uint32_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 6719 uint32_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 7003 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 7160 uint64_t Rn = ReadCoreReg (n, &success); local 7410 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 7559 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 8318 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 8402 uint32_t Rd, Rn; local 8477 uint32_t Rd, Rn, Rm; local 8569 uint32_t Rd, Rn; local 8643 uint32_t Rd, Rn, Rm; local 8732 uint32_t Rn; // the first operand local 8805 uint32_t Rn; // the first operand local 8884 uint32_t Rn; // the first operand local 8944 uint32_t Rn; // the first operand local 9013 uint32_t Rn; // the first operand local 9081 uint32_t Rn; // the first operand local 9162 uint32_t Rn; // the first operand local 9258 uint32_t Rn; // the first operand local 9327 uint32_t Rn; local 9385 uint32_t Rn, Rm; local 9452 uint32_t Rn; local 9509 uint32_t Rn, Rm; local 9958 uint32_t Rn = ReadCoreReg (n, &success); local 10054 uint32_t Rn = ReadCoreReg (n, &success); local 10149 uint32_t Rn = ReadCoreReg (n, &success); local 10296 uint32_t Rn = ReadCoreReg (n, &success); local 10420 uint32_t Rn = ReadCoreReg (n, &success); local 10574 uint32_t Rn = ReadCoreReg (n, &success); local 10712 uint32_t Rn = ReadCoreReg (n, &success); local 10882 uint32_t Rn = ReadCoreReg (n, &success); local 11075 uint32_t Rn = ReadCoreReg (n, &success); local 11229 uint32_t Rn = ReadCoreReg (n, &success); local 11367 uint32_t Rn = ReadCoreReg (n, &success); local 11538 uint32_t Rn = ReadCoreReg (n, &success); local 11710 uint32_t Rn = ReadCoreReg (n, &success); local 11877 uint32_t Rn = ReadCoreReg (n, &success); local 12049 uint32_t Rn = ReadCoreReg (n, &success); local 12175 uint32_t Rn = ReadCoreReg (n, &success); local 12326 uint32_t Rn = ReadCoreReg (n, &success); local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 653 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 658 DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder); 661 DecodeFPR128RegisterClass(Inst, Rn, Address, Decoder); 744 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 772 DecodeGPR32RegisterClass(Inst, Rn, Addr, Decoder); 793 DecodeGPR64RegisterClass(Inst, Rn, Addr, Decoder); 839 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 890 DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); 900 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 958 DecodeGPR64spRegisterClass(Inst, Rn, Add 1085 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 1168 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 1297 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 1354 unsigned Rn = fieldFromInstruction(insn, 5, 5); local 1460 unsigned Rn = fieldFromInstruction(insn, 5, 5); local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 864 // [Rn, Rm] 866 // {2-0} = Rn 869 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); local 871 return (Rm << 3) | Rn; 887 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 971 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 1076 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 1087 // {16-13} = Rn 1095 Binary |= Rn << 13; 1107 // {17-14} Rn 1112 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 1188 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. local 1198 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 1235 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local [all...] |
/freebsd-11.0-release/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.cpp | 527 // integer n = UInt(Rn); 566 const uint32_t Rn = Bits32(opcode, 9, 5); local 572 const uint32_t n = UInt(Rn); 649 uint32_t Rn = Bits32(opcode, 9, 5); local 652 integer n = UInt(Rn);
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/freebsd-11.0-release/contrib/binutils/opcodes/ |
H A D | arm-dis.c | 3442 unsigned int Rn = (given & 0x000f0000) >> 16; 3450 func (stream, "[%s", arm_regnames[Rn]); 3453 else if (Rn == 15) /* 12-bit negative immediate offset */ 3509 if (Rn == 15) 3523 unsigned int Rn = (given & 0x000f0000) >> 16; 3526 func (stream, "[%s", arm_regnames[Rn]); 3441 unsigned int Rn = (given & 0x000f0000) >> 16; local 3522 unsigned int Rn = (given & 0x000f0000) >> 16; local
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/freebsd-11.0-release/contrib/binutils/gas/config/ |
H A D | tc-arm.c | 1854 first_error (_("don't use Rn-Rm syntax with non-unit stride")); 4568 [Rn, #offset] .reg=Rn .reloc.exp=offset 4569 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 4570 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 4577 [Rn], #offset .reg=Rn .reloc.exp=offset 4578 [Rn], 6531 unsigned Rn = inst.operands[2].reg; local 8428 int Rd, Rn; local 8444 int Rd, Rs, Rn; local 8669 int Rd, Rs, Rn; local 8752 int Rd, Rs, Rn; local 9350 int Rn; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 3486 unsigned Rn = Inst.getOperand(3).getReg(); local 3487 if (RI->isSubRegisterEq(Rn, Rt)) 3490 if (RI->isSubRegisterEq(Rn, Rt2)) 3532 unsigned Rn = Inst.getOperand(3).getReg(); local 3533 if (RI->isSubRegisterEq(Rn, Rt)) 3536 if (RI->isSubRegisterEq(Rn, Rt2)) 3564 unsigned Rn = Inst.getOperand(2).getReg(); local 3565 if (RI->isSubRegisterEq(Rn, Rt)) 3583 unsigned Rn = Inst.getOperand(2).getReg(); local 3584 if (RI->isSubRegisterEq(Rn, R [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 2888 unsigned Rn = MI->getOperand(2).getReg(); local 2892 return (Rt == Rn) ? 3 : 2; 2912 unsigned Rn = MI->getOperand(3).getReg(); local 2916 return (Rt == Rn) ? 4 : 3; 2921 unsigned Rn = MI->getOperand(3).getReg(); local 2922 return (Rt == Rn) ? 4 : 3; 2957 unsigned Rn = MI->getOperand(2).getReg(); local 2958 return (Rt == Rn) ? 3 : 2;
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4622 // If we have a three-operand form, make sure to set Rn to be the operand 6106 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); local 6109 if (Rn == Rt || Rn == Rt2) 6165 // Rt must be different from Rn. 6167 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); local 6169 if (Rt == Rn) 6188 // Rt must be different from Rn. 6190 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(2).getReg()); local 6192 if (Rt == Rn) 6215 unsigned Rn = Inst.getOperand(0).getReg(); local 8212 unsigned Rn = Inst.getOperand(0).getReg(); local 8236 unsigned Rn = Inst.getOperand(0).getReg(); local [all...] |