Searched refs:wr32 (Results 1 - 17 of 17) sorted by relevance

/freebsd-11-stable/sys/dev/ixl/
H A Di40e_hmc.h140 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
141 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
142 wr32((hw), I40E_PFHMC_SDCMD, val3); \
159 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
160 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
161 wr32((hw), I40E_PFHMC_SDCMD, val3); \
171 wr32((hw), I40E_PFHMC_PDINV, \
H A Di40e_adminq.c305 wr32(hw, hw->aq.asq.head, 0);
306 wr32(hw, hw->aq.asq.tail, 0);
310 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
313 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
315 wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));
316 wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));
338 wr32(hw, hw->aq.arq.head, 0);
339 wr32(hw, hw->aq.arq.tail, 0);
343 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
346 wr32(h
[all...]
H A Dixl_pf_i2c.c177 wr32(hw, IXL_I2C_REG(hw), i2cctl);
214 wr32(hw, IXL_I2C_REG(hw), i2cctl);
306 wr32(hw, IXL_I2C_REG(hw), i2cctl);
327 wr32(hw, IXL_I2C_REG(hw), *i2cctl);
353 wr32(hw, IXL_I2C_REG(hw), *i2cctl);
406 wr32(hw, IXL_I2C_REG(hw), *i2cctl);
469 wr32(hw, IXL_I2C_REG(hw), i2cctl);
536 wr32(hw, IXL_I2C_REG(hw), i2cctl);
556 wr32(hw, IXL_I2C_REG(hw), i2cctl);
602 wr32(h
[all...]
H A Dixl_iw.c60 wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);
343 wr32(hw, I40E_PFINT_AEQCTL, reg);
352 wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);
357 wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);
365 wr32(hw, I40E_PFINT_CEQCTL(i), reg);
H A Dixl_pf_iov.c252 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_num),
261 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), qtable);
264 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num),
299 wr32(hw, vfint_reg, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
307 wr32(hw, vpint_reg, I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
353 wr32(hw, I40E_PF_PCI_CIAA, IXL_PF_PCI_CIAA_VF_DEVICE_STATUS |
375 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);
407 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_COMPLETED);
411 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);
420 wr32(h
[all...]
H A Dif_ixlv.c2001 wr32(hw, I40E_VFINT_DYN_CTL01, reg);
2034 wr32(hw, I40E_VFINT_DYN_CTL01, 0);
2035 wr32(hw, I40E_VFINT_ICR0_ENA1, 0);
2044 wr32(hw, I40E_VFINT_DYN_CTL01,
2047 wr32(hw, I40E_VFINT_ICR0_ENA1, I40E_VFINT_ICR0_ENA1_ADMINQ_MASK);
2061 wr32(hw, I40E_VFINT_DYN_CTLN1(id), reg);
2067 wr32(hw, I40E_VFINT_DYN_CTLN1(id),
2090 wr32(hw, I40E_VFINT_ITRN1(IXL_RX_ITR, i),
2095 wr32(hw, I40E_VFINT_ITRN1(IXL_TX_ITR, i),
2157 wr32(h
[all...]
H A Di40e_lan_hmc.c522 wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
524 wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
528 wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
530 wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
534 wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
536 wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
540 wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
542 wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
H A Dixl_pf_main.c187 wr32(hw, I40E_PFINT_ITRN(IXL_TX_ITR, i),
206 wr32(hw, I40E_PFINT_ITRN(IXL_RX_ITR, i),
725 wr32(hw, I40E_PFINT_DYN_CTL0,
876 wr32(hw, I40E_PFHMC_ERRORINFO, 0);
1574 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
1585 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
1592 wr32(hw, I40E_PFINT_LNKLST0, 0x7FF);
1594 wr32(hw, I40E_PFINT_ITR0(IXL_RX_ITR), 0x3E);
1596 wr32(hw, I40E_PFINT_DYN_CTL0,
1600 wr32(h
[all...]
H A Di40e_osdep.h228 #define wr32(a, reg, value) wr32_osdep((a)->back, (reg), (value)) macro
H A Di40e_common.c1177 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);
1383 wr32(hw, I40E_PFGEN_CTRL,
1455 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
1458 wr32(hw, I40E_PFINT_DYN_CTLN(i), val);
1462 wr32(hw, I40E_PFINT_LNKLST0, val);
1464 wr32(hw, I40E_PFINT_LNKLSTN(i), val);
1467 wr32(hw, I40E_VPINT_LNKLST0(i), val);
1469 wr32(hw, I40E_VPINT_LNKLSTN(i), val);
1486 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val);
1492 wr32(h
[all...]
H A Dixl_txrx.c466 wr32(hw, txr->tail, i);
1260 wr32(vsi->hw, rxr->tail, rxr->next_refresh);
1500 wr32(vsi->hw, rxr->tail, que->num_rx_desc - 1);
2289 wr32(hw, reg, mask);
H A Dixlvc.c780 wr32(&sc->hw, I40E_VFGEN_RSTAT, VIRTCHNL_VFR_INPROGRESS);
H A Di40e_nvm.c228 wr32(hw, I40E_GLNVM_SRCTL, sr_reg);
/freebsd-11-stable/sys/mips/malta/
H A Dgt_pci_bus_space.c221 #define wr32(a, v) writel(a, htole32(v)) macro
308 wr32(bsh + offset, value);
332 wr32(baddr, *addr++);
358 wr32(baddr, *addr++);
384 wr32(addr, value);
408 wr32(addr, value);
/freebsd-11-stable/sys/mips/cavium/
H A Doctopci_bus_space.c202 #define wr32(a, v) cvmx_write64_uint32(a, htole32(v)) macro
356 wr32(bsh + offset, value);
390 wr32(baddr, *addr++);
428 wr32(baddr, *addr++);
464 wr32(addr, value);
498 wr32(addr, value);
556 wr32(addr2, rd32(addr1));
561 wr32(addr2, rd32(addr1));
/freebsd-11-stable/sys/mips/mips/
H A Dbus_space_generic.c201 #define wr32(a, v) cvmx_write64_uint32(a, v) macro
210 #define wr32(a, v) sb_big_endian_write32(a, v) macro
220 #define wr32(a, v) writel(a, v) macro
434 wr32(bsh + offset, value);
480 wr32(baddr, *addr++);
532 wr32(baddr, *addr++);
584 wr32(addr, value);
632 wr32(addr, value);
704 wr32(addr2, rd32(addr1));
709 wr32(addr
[all...]
/freebsd-11-stable/sys/dev/netmap/
H A Dif_ixl_netmap.h260 wr32(vsi->hw, txr->tail, nic_i);
409 wr32(vsi->hw, rxr->tail, nic_i);

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