1/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ 2/*- 3 * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $ 4 * 5 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41/* 42 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 43 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Christopher G. Demetriou 56 * for the NetBSD Project. 57 * 4. The name of the author may not be used to endorse or promote products 58 * derived from this software without specific prior written permission 59 * 60 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 63 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 64 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 65 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 66 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 67 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 68 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 69 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 70 * 71 * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter 72 * $FreeBSD$ 73 */ 74#include <sys/cdefs.h> 75__FBSDID("$FreeBSD$"); 76 77#include <sys/param.h> 78#include <sys/systm.h> 79#include <sys/bus.h> 80#include <sys/endian.h> 81#include <sys/kernel.h> 82#include <sys/malloc.h> 83#include <sys/ktr.h> 84 85#include <vm/vm.h> 86#include <vm/pmap.h> 87#include <vm/vm_kern.h> 88#include <vm/vm_extern.h> 89 90#include <machine/bus.h> 91#include <machine/cache.h> 92#include <mips/malta/gt_pci_bus_space.h> 93 94static bs_r_2_proto(gt_pci); 95static bs_r_4_proto(gt_pci); 96static bs_w_2_proto(gt_pci); 97static bs_w_4_proto(gt_pci); 98static bs_rm_2_proto(gt_pci); 99static bs_rm_4_proto(gt_pci); 100static bs_wm_2_proto(gt_pci); 101static bs_wm_4_proto(gt_pci); 102static bs_rr_2_proto(gt_pci); 103static bs_rr_4_proto(gt_pci); 104static bs_wr_2_proto(gt_pci); 105static bs_wr_4_proto(gt_pci); 106static bs_sm_2_proto(gt_pci); 107static bs_sm_4_proto(gt_pci); 108static bs_sr_2_proto(gt_pci); 109static bs_sr_4_proto(gt_pci); 110 111static struct bus_space gt_pci_space = { 112 /* cookie */ 113 .bs_cookie = (void *) 0, 114 115 /* mapping/unmapping */ 116 .bs_map = generic_bs_map, 117 .bs_unmap = generic_bs_unmap, 118 .bs_subregion = generic_bs_subregion, 119 120 /* allocation/deallocation */ 121 .bs_alloc = generic_bs_alloc, 122 .bs_free = generic_bs_free, 123 124 /* barrier */ 125 .bs_barrier = generic_bs_barrier, 126 127 /* read (single) */ 128 .bs_r_1 = generic_bs_r_1, 129 .bs_r_2 = gt_pci_bs_r_2, 130 .bs_r_4 = gt_pci_bs_r_4, 131 .bs_r_8 = NULL, 132 133 /* read multiple */ 134 .bs_rm_1 = generic_bs_rm_1, 135 .bs_rm_2 = gt_pci_bs_rm_2, 136 .bs_rm_4 = gt_pci_bs_rm_4, 137 .bs_rm_8 = NULL, 138 139 /* read region */ 140 .bs_rr_1 = generic_bs_rr_1, 141 .bs_rr_2 = gt_pci_bs_rr_2, 142 .bs_rr_4 = gt_pci_bs_rr_4, 143 .bs_rr_8 = NULL, 144 145 /* write (single) */ 146 .bs_w_1 = generic_bs_w_1, 147 .bs_w_2 = gt_pci_bs_w_2, 148 .bs_w_4 = gt_pci_bs_w_4, 149 .bs_w_8 = NULL, 150 151 /* write multiple */ 152 .bs_wm_1 = generic_bs_wm_1, 153 .bs_wm_2 = gt_pci_bs_wm_2, 154 .bs_wm_4 = gt_pci_bs_wm_4, 155 .bs_wm_8 = NULL, 156 157 /* write region */ 158 .bs_wr_1 = generic_bs_wr_1, 159 .bs_wr_2 = gt_pci_bs_wr_2, 160 .bs_wr_4 = gt_pci_bs_wr_4, 161 .bs_wr_8 = NULL, 162 163 /* set multiple */ 164 .bs_sm_1 = generic_bs_sm_1, 165 .bs_sm_2 = gt_pci_bs_sm_2, 166 .bs_sm_4 = gt_pci_bs_sm_4, 167 .bs_sm_8 = NULL, 168 169 /* set region */ 170 .bs_sr_1 = generic_bs_sr_1, 171 .bs_sr_2 = gt_pci_bs_sr_2, 172 .bs_sr_4 = gt_pci_bs_sr_4, 173 .bs_sr_8 = NULL, 174 175 /* copy */ 176 .bs_c_1 = generic_bs_c_1, 177 .bs_c_2 = generic_bs_c_2, 178 .bs_c_4 = generic_bs_c_4, 179 .bs_c_8 = NULL, 180 181 /* read (single) stream */ 182 .bs_r_1_s = generic_bs_r_1, 183 .bs_r_2_s = generic_bs_r_2, 184 .bs_r_4_s = generic_bs_r_4, 185 .bs_r_8_s = NULL, 186 187 /* read multiple stream */ 188 .bs_rm_1_s = generic_bs_rm_1, 189 .bs_rm_2_s = generic_bs_rm_2, 190 .bs_rm_4_s = generic_bs_rm_4, 191 .bs_rm_8_s = NULL, 192 193 /* read region stream */ 194 .bs_rr_1_s = generic_bs_rr_1, 195 .bs_rr_2_s = generic_bs_rr_2, 196 .bs_rr_4_s = generic_bs_rr_4, 197 .bs_rr_8_s = NULL, 198 199 /* write (single) stream */ 200 .bs_w_1_s = generic_bs_w_1, 201 .bs_w_2_s = generic_bs_w_2, 202 .bs_w_4_s = generic_bs_w_4, 203 .bs_w_8_s = NULL, 204 205 /* write multiple stream */ 206 .bs_wm_1_s = generic_bs_wm_1, 207 .bs_wm_2_s = generic_bs_wm_2, 208 .bs_wm_4_s = generic_bs_wm_4, 209 .bs_wm_8_s = NULL, 210 211 /* write region stream */ 212 .bs_wr_1_s = generic_bs_wr_1, 213 .bs_wr_2_s = generic_bs_wr_2, 214 .bs_wr_4_s = generic_bs_wr_4, 215 .bs_wr_8_s = NULL, 216}; 217 218#define rd16(a) le16toh(readw(a)) 219#define rd32(a) le32toh(readl(a)) 220#define wr16(a, v) writew(a, htole16(v)) 221#define wr32(a, v) writel(a, htole32(v)) 222 223/* generic bus_space tag */ 224bus_space_tag_t gt_pci_bus_space = >_pci_space; 225 226uint16_t 227gt_pci_bs_r_2(void *t, bus_space_handle_t handle, 228 bus_size_t offset) 229{ 230 231 return (rd16(handle + offset)); 232} 233 234uint32_t 235gt_pci_bs_r_4(void *t, bus_space_handle_t handle, 236 bus_size_t offset) 237{ 238 239 return (rd32(handle + offset)); 240} 241 242void 243gt_pci_bs_rm_2(void *t, bus_space_handle_t bsh, 244 bus_size_t offset, uint16_t *addr, size_t count) 245{ 246 bus_addr_t baddr = bsh + offset; 247 248 while (count--) 249 *addr++ = rd16(baddr); 250} 251 252void 253gt_pci_bs_rm_4(void *t, bus_space_handle_t bsh, 254 bus_size_t offset, uint32_t *addr, size_t count) 255{ 256 bus_addr_t baddr = bsh + offset; 257 258 while (count--) 259 *addr++ = rd32(baddr); 260} 261 262/* 263 * Read `count' 2 or 4 byte quantities from bus space 264 * described by tag/handle and starting at `offset' and copy into 265 * buffer provided. 266 */ 267void 268gt_pci_bs_rr_2(void *t, bus_space_handle_t bsh, 269 bus_size_t offset, uint16_t *addr, size_t count) 270{ 271 bus_addr_t baddr = bsh + offset; 272 273 while (count--) { 274 *addr++ = rd16(baddr); 275 baddr += 2; 276 } 277} 278 279void 280gt_pci_bs_rr_4(void *t, bus_space_handle_t bsh, 281 bus_size_t offset, uint32_t *addr, size_t count) 282{ 283 bus_addr_t baddr = bsh + offset; 284 285 while (count--) { 286 *addr++ = rd32(baddr); 287 baddr += 4; 288 } 289} 290 291/* 292 * Write the 2 or 4 byte value `value' to bus space 293 * described by tag/handle/offset. 294 */ 295void 296gt_pci_bs_w_2(void *t, bus_space_handle_t bsh, 297 bus_size_t offset, uint16_t value) 298{ 299 300 wr16(bsh + offset, value); 301} 302 303void 304gt_pci_bs_w_4(void *t, bus_space_handle_t bsh, 305 bus_size_t offset, uint32_t value) 306{ 307 308 wr32(bsh + offset, value); 309} 310 311/* 312 * Write `count' 2 or 4 byte quantities from the buffer 313 * provided to bus space described by tag/handle/offset. 314 */ 315void 316gt_pci_bs_wm_2(void *t, bus_space_handle_t bsh, 317 bus_size_t offset, const uint16_t *addr, size_t count) 318{ 319 bus_addr_t baddr = bsh + offset; 320 321 while (count--) 322 wr16(baddr, *addr++); 323} 324 325void 326gt_pci_bs_wm_4(void *t, bus_space_handle_t bsh, 327 bus_size_t offset, const uint32_t *addr, size_t count) 328{ 329 bus_addr_t baddr = bsh + offset; 330 331 while (count--) 332 wr32(baddr, *addr++); 333} 334 335/* 336 * Write `count' 2 or 4 byte quantities from the buffer provided 337 * to bus space described by tag/handle starting at `offset'. 338 */ 339void 340gt_pci_bs_wr_2(void *t, bus_space_handle_t bsh, 341 bus_size_t offset, const uint16_t *addr, size_t count) 342{ 343 bus_addr_t baddr = bsh + offset; 344 345 while (count--) { 346 wr16(baddr, *addr++); 347 baddr += 2; 348 } 349} 350 351void 352gt_pci_bs_wr_4(void *t, bus_space_handle_t bsh, 353 bus_size_t offset, const uint32_t *addr, size_t count) 354{ 355 bus_addr_t baddr = bsh + offset; 356 357 while (count--) { 358 wr32(baddr, *addr++); 359 baddr += 4; 360 } 361} 362 363/* 364 * Write the 2 or 4 byte value `val' to bus space described 365 * by tag/handle/offset `count' times. 366 */ 367void 368gt_pci_bs_sm_2(void *t, bus_space_handle_t bsh, 369 bus_size_t offset, uint16_t value, size_t count) 370{ 371 bus_addr_t addr = bsh + offset; 372 373 while (count--) 374 wr16(addr, value); 375} 376 377void 378gt_pci_bs_sm_4(void *t, bus_space_handle_t bsh, 379 bus_size_t offset, uint32_t value, size_t count) 380{ 381 bus_addr_t addr = bsh + offset; 382 383 while (count--) 384 wr32(addr, value); 385} 386 387/* 388 * Write `count' 2 or 4 byte value `val' to bus space described 389 * by tag/handle starting at `offset'. 390 */ 391void 392gt_pci_bs_sr_2(void *t, bus_space_handle_t bsh, 393 bus_size_t offset, uint16_t value, size_t count) 394{ 395 bus_addr_t addr = bsh + offset; 396 397 for (; count != 0; count--, addr += 2) 398 wr16(addr, value); 399} 400 401void 402gt_pci_bs_sr_4(void *t, bus_space_handle_t bsh, 403 bus_size_t offset, uint32_t value, size_t count) 404{ 405 bus_addr_t addr = bsh + offset; 406 407 for (; count != 0; count--, addr += 4) 408 wr32(addr, value); 409} 410