1266423Sjfv/****************************************************************************** 2266423Sjfv 3349163Serj Copyright (c) 2013-2019, Intel Corporation 4266423Sjfv All rights reserved. 5349163Serj 6266423Sjfv Redistribution and use in source and binary forms, with or without 7266423Sjfv modification, are permitted provided that the following conditions are met: 8266423Sjfv 9266423Sjfv 1. Redistributions of source code must retain the above copyright notice, 10266423Sjfv this list of conditions and the following disclaimer. 11266423Sjfv 12266423Sjfv 2. Redistributions in binary form must reproduce the above copyright 13266423Sjfv notice, this list of conditions and the following disclaimer in the 14266423Sjfv documentation and/or other materials provided with the distribution. 15266423Sjfv 16266423Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17266423Sjfv contributors may be used to endorse or promote products derived from 18266423Sjfv this software without specific prior written permission. 19266423Sjfv 20266423Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21266423Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22266423Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23266423Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24266423Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25266423Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26266423Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27266423Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28266423Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29266423Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30266423Sjfv POSSIBILITY OF SUCH DAMAGE. 31266423Sjfv 32266423Sjfv******************************************************************************/ 33266423Sjfv/*$FreeBSD: stable/11/sys/dev/ixl/i40e_hmc.h 349163 2019-06-18 00:08:02Z erj $*/ 34266423Sjfv 35266423Sjfv#ifndef _I40E_HMC_H_ 36266423Sjfv#define _I40E_HMC_H_ 37266423Sjfv 38266423Sjfv#define I40E_HMC_MAX_BP_COUNT 512 39266423Sjfv 40266423Sjfv/* forward-declare the HW struct for the compiler */ 41266423Sjfvstruct i40e_hw; 42266423Sjfv 43266423Sjfv#define I40E_HMC_INFO_SIGNATURE 0x484D5347 /* HMSG */ 44266423Sjfv#define I40E_HMC_PD_CNT_IN_SD 512 45266423Sjfv#define I40E_HMC_DIRECT_BP_SIZE 0x200000 /* 2M */ 46266423Sjfv#define I40E_HMC_PAGED_BP_SIZE 4096 47266423Sjfv#define I40E_HMC_PD_BP_BUF_ALIGNMENT 4096 48266423Sjfv#define I40E_FIRST_VF_FPM_ID 16 49266423Sjfv 50266423Sjfvstruct i40e_hmc_obj_info { 51266423Sjfv u64 base; /* base addr in FPM */ 52266423Sjfv u32 max_cnt; /* max count available for this hmc func */ 53266423Sjfv u32 cnt; /* count of objects driver actually wants to create */ 54266423Sjfv u64 size; /* size in bytes of one object */ 55266423Sjfv}; 56266423Sjfv 57266423Sjfvenum i40e_sd_entry_type { 58266423Sjfv I40E_SD_TYPE_INVALID = 0, 59266423Sjfv I40E_SD_TYPE_PAGED = 1, 60266423Sjfv I40E_SD_TYPE_DIRECT = 2 61266423Sjfv}; 62266423Sjfv 63266423Sjfvstruct i40e_hmc_bp { 64266423Sjfv enum i40e_sd_entry_type entry_type; 65266423Sjfv struct i40e_dma_mem addr; /* populate to be used by hw */ 66266423Sjfv u32 sd_pd_index; 67266423Sjfv u32 ref_cnt; 68266423Sjfv}; 69266423Sjfv 70266423Sjfvstruct i40e_hmc_pd_entry { 71266423Sjfv struct i40e_hmc_bp bp; 72266423Sjfv u32 sd_index; 73284049Sjfv bool rsrc_pg; 74266423Sjfv bool valid; 75266423Sjfv}; 76266423Sjfv 77266423Sjfvstruct i40e_hmc_pd_table { 78266423Sjfv struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */ 79266423Sjfv struct i40e_hmc_pd_entry *pd_entry; /* [512] for sw book keeping */ 80266423Sjfv struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */ 81266423Sjfv 82266423Sjfv u32 ref_cnt; 83266423Sjfv u32 sd_index; 84266423Sjfv}; 85266423Sjfv 86266423Sjfvstruct i40e_hmc_sd_entry { 87266423Sjfv enum i40e_sd_entry_type entry_type; 88266423Sjfv bool valid; 89266423Sjfv 90266423Sjfv union { 91266423Sjfv struct i40e_hmc_pd_table pd_table; 92266423Sjfv struct i40e_hmc_bp bp; 93266423Sjfv } u; 94266423Sjfv}; 95266423Sjfv 96266423Sjfvstruct i40e_hmc_sd_table { 97266423Sjfv struct i40e_virt_mem addr; /* used to track sd_entry allocations */ 98266423Sjfv u32 sd_cnt; 99266423Sjfv u32 ref_cnt; 100266423Sjfv struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */ 101266423Sjfv}; 102266423Sjfv 103266423Sjfvstruct i40e_hmc_info { 104266423Sjfv u32 signature; 105266423Sjfv /* equals to pci func num for PF and dynamically allocated for VFs */ 106266423Sjfv u8 hmc_fn_id; 107266423Sjfv u16 first_sd_index; /* index of the first available SD */ 108266423Sjfv 109266423Sjfv /* hmc objects */ 110266423Sjfv struct i40e_hmc_obj_info *hmc_obj; 111266423Sjfv struct i40e_virt_mem hmc_obj_virt_mem; 112266423Sjfv struct i40e_hmc_sd_table sd_table; 113266423Sjfv}; 114266423Sjfv 115266423Sjfv#define I40E_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++) 116266423Sjfv#define I40E_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++) 117266423Sjfv#define I40E_INC_BP_REFCNT(bp) ((bp)->ref_cnt++) 118266423Sjfv 119266423Sjfv#define I40E_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--) 120266423Sjfv#define I40E_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--) 121266423Sjfv#define I40E_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--) 122266423Sjfv 123266423Sjfv/** 124266423Sjfv * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware 125266423Sjfv * @hw: pointer to our hw struct 126266423Sjfv * @pa: pointer to physical address 127266423Sjfv * @sd_index: segment descriptor index 128266423Sjfv * @type: if sd entry is direct or paged 129266423Sjfv **/ 130266423Sjfv#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \ 131266423Sjfv{ \ 132266423Sjfv u32 val1, val2, val3; \ 133266423Sjfv val1 = (u32)(I40E_HI_DWORD(pa)); \ 134266423Sjfv val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT << \ 135266423Sjfv I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ 136266423Sjfv ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ 137266423Sjfv I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \ 138284049Sjfv BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \ 139284049Sjfv val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ 140266423Sjfv wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ 141266423Sjfv wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 142266423Sjfv wr32((hw), I40E_PFHMC_SDCMD, val3); \ 143266423Sjfv} 144266423Sjfv 145266423Sjfv/** 146266423Sjfv * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware 147266423Sjfv * @hw: pointer to our hw struct 148266423Sjfv * @sd_index: segment descriptor index 149266423Sjfv * @type: if sd entry is direct or paged 150266423Sjfv **/ 151266423Sjfv#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \ 152266423Sjfv{ \ 153266423Sjfv u32 val2, val3; \ 154266423Sjfv val2 = (I40E_HMC_MAX_BP_COUNT << \ 155266423Sjfv I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ 156266423Sjfv ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ 157266423Sjfv I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \ 158284049Sjfv val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ 159266423Sjfv wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ 160266423Sjfv wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ 161266423Sjfv wr32((hw), I40E_PFHMC_SDCMD, val3); \ 162266423Sjfv} 163266423Sjfv 164266423Sjfv/** 165266423Sjfv * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware 166266423Sjfv * @hw: pointer to our hw struct 167266423Sjfv * @sd_idx: segment descriptor index 168266423Sjfv * @pd_idx: page descriptor index 169266423Sjfv **/ 170266423Sjfv#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \ 171266423Sjfv wr32((hw), I40E_PFHMC_PDINV, \ 172266423Sjfv (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \ 173266423Sjfv ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT))) 174266423Sjfv 175266423Sjfv/** 176266423Sjfv * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit 177266423Sjfv * @hmc_info: pointer to the HMC configuration information structure 178266423Sjfv * @type: type of HMC resources we're searching 179266423Sjfv * @index: starting index for the object 180266423Sjfv * @cnt: number of objects we're trying to create 181266423Sjfv * @sd_idx: pointer to return index of the segment descriptor in question 182266423Sjfv * @sd_limit: pointer to return the maximum number of segment descriptors 183266423Sjfv * 184266423Sjfv * This function calculates the segment descriptor index and index limit 185266423Sjfv * for the resource defined by i40e_hmc_rsrc_type. 186266423Sjfv **/ 187266423Sjfv#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\ 188266423Sjfv{ \ 189266423Sjfv u64 fpm_addr, fpm_limit; \ 190266423Sjfv fpm_addr = (hmc_info)->hmc_obj[(type)].base + \ 191266423Sjfv (hmc_info)->hmc_obj[(type)].size * (index); \ 192266423Sjfv fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\ 193266423Sjfv *(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \ 194266423Sjfv *(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \ 195266423Sjfv /* add one more to the limit to correct our range */ \ 196266423Sjfv *(sd_limit) += 1; \ 197266423Sjfv} 198266423Sjfv 199266423Sjfv/** 200266423Sjfv * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit 201266423Sjfv * @hmc_info: pointer to the HMC configuration information struct 202266423Sjfv * @type: HMC resource type we're examining 203266423Sjfv * @idx: starting index for the object 204266423Sjfv * @cnt: number of objects we're trying to create 205266423Sjfv * @pd_index: pointer to return page descriptor index 206266423Sjfv * @pd_limit: pointer to return page descriptor index limit 207266423Sjfv * 208266423Sjfv * Calculates the page descriptor index and index limit for the resource 209266423Sjfv * defined by i40e_hmc_rsrc_type. 210266423Sjfv **/ 211266423Sjfv#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\ 212266423Sjfv{ \ 213266423Sjfv u64 fpm_adr, fpm_limit; \ 214266423Sjfv fpm_adr = (hmc_info)->hmc_obj[(type)].base + \ 215266423Sjfv (hmc_info)->hmc_obj[(type)].size * (idx); \ 216266423Sjfv fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \ 217266423Sjfv *(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \ 218266423Sjfv *(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \ 219266423Sjfv /* add one more to the limit to correct our range */ \ 220266423Sjfv *(pd_limit) += 1; \ 221266423Sjfv} 222266423Sjfvenum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw, 223266423Sjfv struct i40e_hmc_info *hmc_info, 224266423Sjfv u32 sd_index, 225266423Sjfv enum i40e_sd_entry_type type, 226266423Sjfv u64 direct_mode_sz); 227266423Sjfv 228266423Sjfvenum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, 229266423Sjfv struct i40e_hmc_info *hmc_info, 230284049Sjfv u32 pd_index, 231284049Sjfv struct i40e_dma_mem *rsrc_pg); 232266423Sjfvenum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw, 233266423Sjfv struct i40e_hmc_info *hmc_info, 234266423Sjfv u32 idx); 235266423Sjfvenum i40e_status_code i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info, 236266423Sjfv u32 idx); 237266423Sjfvenum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw, 238266423Sjfv struct i40e_hmc_info *hmc_info, 239266423Sjfv u32 idx, bool is_pf); 240266423Sjfvenum i40e_status_code i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info, 241266423Sjfv u32 idx); 242266423Sjfvenum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw, 243266423Sjfv struct i40e_hmc_info *hmc_info, 244266423Sjfv u32 idx, bool is_pf); 245266423Sjfv 246266423Sjfv#endif /* _I40E_HMC_H_ */ 247