Searched refs:qlm_cfg (Results 1 - 9 of 9) sorted by relevance

/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-qlm.c416 cvmx_mio_qlmx_cfg_t qlm_cfg; local
431 qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(qlm));
434 if ((qlm_cfg.s.qlm_spd == 5) || (qlm_cfg.s.qlm_spd == 12) ||
435 (qlm_cfg.s.qlm_spd == 0) || (qlm_cfg.s.qlm_spd == 6) ||
436 (qlm_cfg.s.qlm_spd == 11))
551 cvmx_mio_qlmx_cfg_t qlm_cfg; local
553 qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(qlm));
554 switch (qlm_cfg
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H A Dcvmx-helper.c213 cvmx_mio_qlmx_cfg_t qlm_cfg; local
217 qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));
219 if (qlm_cfg.s.qlm_spd == 15)
222 if (qlm_cfg.s.qlm_cfg == 7)
224 else if (qlm_cfg.s.qlm_cfg == 2)
226 else if (qlm_cfg.s.qlm_cfg == 3)
232 qlm_cfg
349 cvmx_mio_qlmx_cfg_t qlm_cfg; local
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H A Dcvmx-helper-xaui.c374 cvmx_mio_qlmx_cfg_t qlm_cfg; local
378 qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(qlm));
380 lanes = (qlm_cfg.s.qlm_cfg == 7) ? 2 : 4;
H A Dcvmx-srio.c701 prt_cfg.s.molr = ((prt_cfg.s.qlm_cfg == 1 || prt_cfg.s.qlm_cfg == 3) ? 8
702 : (prt_cfg.s.qlm_cfg == 4 || prt_cfg.s.qlm_cfg == 6) ? 16
713 sriox_imsg_vport_thr.s.max_tot = ((prt_cfg.s.qlm_cfg == 1 || prt_cfg.s.qlm_cfg == 3) ? 44 : 46);
H A Dcvmx-pescx-defs.h471 uint64_t qlm_cfg : 2; /**< The QLM configuration pad bits. */ member in struct:cvmx_pescx_ctl_status::cvmx_pescx_ctl_status_s
507 uint64_t qlm_cfg : 2;
520 uint64_t qlm_cfg : 2; /**< The QLM configuration pad bits. */ member in struct:cvmx_pescx_ctl_status::cvmx_pescx_ctl_status_cn56xx
554 uint64_t qlm_cfg : 2;
H A Dcvmx-pcie.c373 if (pescx_ctl_status.s.qlm_cfg == 0)
931 cvmx_mio_qlmx_cfg_t qlm_cfg; local
932 qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1));
933 if (qlm_cfg.s.qlm_cfg == 1)
H A Dcvmx-dpi-defs.h1788 uint64_t qlm_cfg : 4; /**< QLM_CFG is a function of MIO_QLMx_CFG[QLM_CFG] member in struct:cvmx_dpi_sli_prtx_cfg::cvmx_dpi_sli_prtx_cfg_s
1877 uint64_t qlm_cfg : 4;
1892 uint64_t qlm_cfg : 1; /**< Read only copy of the QLM CFG pin member in struct:cvmx_dpi_sli_prtx_cfg::cvmx_dpi_sli_prtx_cfg_cn63xx
1971 uint64_t qlm_cfg : 1;
H A Dcvmx-ilk.c176 /* check the availability of qlms. qlm_cfg = 001 means the chip is fused
180 if (mio_qlmx_cfg.s.qlm_cfg != 1 ||
181 (uni_mask == 0xff && other_mio_qlmx_cfg.s.qlm_cfg != 1))
H A Dcvmx-mio-defs.h5766 uint64_t qlm_cfg : 4; /**< QLM configuration mode member in struct:cvmx_mio_qlmx_cfg::cvmx_mio_qlmx_cfg_s
5777 uint64_t qlm_cfg : 4;
5824 uint64_t qlm_cfg : 2; /**< QLM configuration mode member in struct:cvmx_mio_qlmx_cfg::cvmx_mio_qlmx_cfg_cn61xx
5841 uint64_t qlm_cfg : 2;
5870 uint64_t qlm_cfg : 4; /**< QLM configuration mode member in struct:cvmx_mio_qlmx_cfg::cvmx_mio_qlmx_cfg_cn66xx
5890 uint64_t qlm_cfg : 4;
5917 uint64_t qlm_cfg : 3; /**< QLM configuration mode member in struct:cvmx_mio_qlmx_cfg::cvmx_mio_qlmx_cfg_cn68xx
5929 uint64_t qlm_cfg : 3;

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