| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 295 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | HexagonISelLowering.cpp | 3109 /// isFPImmLegal - Returns true if the target can instruction select the
3112 bool HexagonTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:HexagonTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.h | 180 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | AMDGPUISelLowering.cpp | 622 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:AMDGPUTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 427 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | SystemZISelLowering.cpp | 810 bool SystemZTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:SystemZTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 364 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | AArch64ISelLowering.cpp | 5993 bool AArch64TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:AArch64TargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 678 /// isFPImmLegal - Returns true if the target can instruction select the
681 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | MipsISelLowering.cpp | 4281 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:MipsTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 504 /// isFPImmLegal - Returns true if the target can instruction select the
507 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | ARMFastISel.cpp | 427 if (TLI.isFPImmLegal(Val, VT)) {
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| H A D | ARMISelLowering.cpp | 6577 if (isFPImmLegal(FPVal, VT))
16514 /// isFPImmLegal - Returns true if the target can instruction select the
16517 bool ARMTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:ARMTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 965 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | PPCISelLowering.cpp | 15443 bool PPCTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, function in class:PPCTargetLowering
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1104 bool isFPImmLegal(const APFloat &Imm, EVT VT,
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| H A D | X86ISelLowering.cpp | 5014 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 872 virtual bool isFPImmLegal(const APFloat & /*Imm*/, EVT /*VT*/, function
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 5520 isFPImmLegal(neg(cast<ConstantFPSDNode>(Op)->getValueAPF()), VT,
5536 isFPImmLegal(neg(cast<ConstantFPSDNode>(N)->getValueAPF()), VT,
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| H A D | DAGCombiner.cpp | 12624 (N1.hasOneUse() && !TLI.isFPImmLegal(N1CFP->getValueAPF(), VT,
12775 TLI.isFPImmLegal(Recip, VT, ForCodeSize)))
13434 if (LegalDAG && (TLI.isFPImmLegal(CVal, VT, ForCodeSize) ||
20325 TLI.isFPImmLegal(TV->getValueAPF(), TV->getValueType(0), ForCodeSize) ||
20326 TLI.isFPImmLegal(FV->getValueAPF(), FV->getValueType(0), ForCodeSize))
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| H A D | LegalizeDAG.cpp | 3242 if (!TLI.isFPImmLegal(CFP->getValueAPF(), Node->getValueType(0),
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