Searched refs:irq_mask (Results 1 - 11 of 11) sorted by relevance

/freebsd-11-stable/sys/arm/mv/
H A Dtimer.c146 uint32_t irq_cause, irq_mask; local
198 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK);
199 irq_mask |= IRQ_TIMER0_MASK;
200 irq_mask &= ~IRQ_TIMER1_MASK;
201 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask);
333 uint32_t irq_mask; local
349 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK);
350 irq_mask |= IRQ_TIMER_WD_MASK;
351 write_cpu_ctrl(BRIDGE_IRQ_MASK, irq_mask);
374 uint32_t irq_mask; local
[all...]
/freebsd-11-stable/sys/dev/drm/
H A Dradeon_irq.c138 u32 irq_mask = RADEON_SW_INT_TEST; local
158 irq_mask |= R500_DISPLAY_INT_STATUS;
160 irq_mask |= RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT;
162 irqs &= irq_mask;
/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dradeon_irq.c137 u32 irq_mask = RADEON_SW_INT_TEST; local
155 irq_mask |= R500_DISPLAY_INT_STATUS;
157 irq_mask |= RADEON_CRTC_VBLANK_STAT | RADEON_CRTC2_VBLANK_STAT;
159 irqs &= irq_mask;
H A Drs600.c649 uint32_t irq_mask = S_000044_SW_INT(1); local
690 return irqs & irq_mask;
H A Dr100.c763 uint32_t irq_mask = RADEON_SW_INT_TEST | local
770 return irqs & irq_mask;
/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-interrupt.c382 uint64_t irq_mask; local
390 irq_mask = cvmx_read_csr(CVMX_CIU_INTX_SUM0(ciu_offset)) & cvmx_interrupt_ciu_en0_mirror;
391 CVMX_DCLZ(bit, irq_mask);
395 uint64_t irq_mask; local
397 irq_mask = cvmx_read_csr(CVMX_CIU_SUM2_PPX_IP2(core)) & cvmx_interrupt_ciu_61xx_timer_mirror;
398 CVMX_DCLZ(bit, irq_mask);
430 irq_mask = cvmx_read_csr(CVMX_CIU_INT_SUM1) & cvmx_interrupt_ciu_en1_mirror;
431 CVMX_DCLZ(bit, irq_mask);
465 uint64_t irq_mask; local
470 irq_mask
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/freebsd-11-stable/sys/dev/tpm/
H A Dtpm_tis.c210 uint32_t irq_mask; local
217 irq_mask = RD4(sc, TPM_INT_ENABLE);
218 irq_mask |= TPM_INT_ENABLE_GLOBAL_ENABLE |
223 WR4(sc, TPM_INT_ENABLE, irq_mask);
/freebsd-11-stable/sys/dev/drm2/i915/
H A Di915_irq.c47 if ((dev_priv->irq_mask & mask) != 0) {
48 dev_priv->irq_mask &= ~mask;
49 I915_WRITE(DEIMR, dev_priv->irq_mask);
57 if ((dev_priv->irq_mask & mask) != mask) {
58 dev_priv->irq_mask |= mask;
59 I915_WRITE(DEIMR, dev_priv->irq_mask);
1873 dev_priv->irq_mask = ~display_mask;
1877 I915_WRITE(DEIMR, dev_priv->irq_mask);
1943 dev_priv->irq_mask = ~display_mask;
1947 I915_WRITE(DEIMR, dev_priv->irq_mask);
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H A Dintel_ringbuffer.c792 dev_priv->irq_mask &= ~ring->irq_enable_mask;
793 I915_WRITE(IMR, dev_priv->irq_mask);
809 dev_priv->irq_mask |= ring->irq_enable_mask;
810 I915_WRITE(IMR, dev_priv->irq_mask);
827 dev_priv->irq_mask &= ~ring->irq_enable_mask;
828 I915_WRITE16(IMR, dev_priv->irq_mask);
844 dev_priv->irq_mask |= ring->irq_enable_mask;
845 I915_WRITE16(IMR, dev_priv->irq_mask);
H A Di915_drv.h672 u32 irq_mask; member in struct:drm_i915_private
/freebsd-11-stable/sys/dev/sound/pci/
H A Demu10kx.c366 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */ member in struct:emu_sc_info

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