| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Instruction.cpp | 56 CyclesLeft = getLatency();
125 dbgs() << "{ OpIdx=" << WD->OpIndex << ", Lat=" << getLatency() << ", RegID "
173 CyclesLeft = getLatency();
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ScheduleDAG.cpp | 85 dbgs() << " Latency=" << getLatency();
91 dbgs() << " Latency=" << getLatency();
94 dbgs() << " Latency=" << getLatency();
117 if (PredDep.getLatency() < D.getLatency()) {
124 SuccDep.setLatency(D.getLatency());
128 PredDep.setLatency(D.getLatency());
168 if (P.getLatency() != 0) {
211 if (P.getLatency() != 0) {
276 PredSU->Depth + PredDep.getLatency());
[all...] |
| H A D | LatencyPriorityQueue.cpp | 36 unsigned LHSLatency = PQ->getLatency(LHSNum);
37 unsigned RHSLatency = PQ->getLatency(RHSNum);
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| H A D | MachineCombiner.cpp | 97 unsigned getLatency(MachineInstr *Root, MachineInstr *NewRoot,
224 unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot, function in class:MachineCombiner
292 NewRootLatency += getLatency(&MI, NewRoot, BlockTrace);
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| H A D | MachinePipeliner.cpp | 1098 unsigned Delay = Nodes.getLatency();
1132 unsigned Lat = D.getLatency();
1388 if (IP->getLatency() == 0)
1393 asap = std::max(asap, (int)(getASAP(pred) + IP->getLatency() -
1412 if (IS->getLatency() == 0)
1417 alap = std::min(alap, (int)(getALAP(succ) - IS->getLatency() +
2415 int EarlyStart = cycle + Dep.getLatency() -
2423 int LateStart = cycle - Dep.getLatency() +
2439 int LateStart = cycle - Dep.getLatency() +
2447 int EarlyStart = cycle + Dep.getLatency()
[all...] |
| H A D | CriticalAntiDepBreaker.cpp | 152 unsigned PredLatency = P->getLatency();
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| H A D | AggressiveAntiDepBreaker.cpp | 286 unsigned PredLatency = P->getLatency();
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| H A D | MachineScheduler.cpp | 639 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency())
640 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency();
676 if (PredSU->BotReadyCycle < SU->BotReadyCycle + PredEdge->getLatency())
677 PredSU->BotReadyCycle = SU->BotReadyCycle + PredEdge->getLatency();
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LatencyPriorityQueue.h | 68 unsigned getLatency(unsigned NodeNum) const { function in class:llvm::LatencyPriorityQueue
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| H A D | ResourcePriorityQueue.h | 93 unsigned getLatency(unsigned NodeNum) const { function in class:llvm::ResourcePriorityQueue
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| H A D | MachinePipeliner.h | 336 Latency += Succ.getLatency();
377 unsigned getLatency() { return Latency; } function in class:llvm::NodeSet
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| H A D | ScheduleDAG.h | 142 unsigned getLatency() const { function in class:llvm::SDep
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHazardRecognizer.cpp | 144 if (S.isAssignedRegDep() && S.getLatency() == 0 &&
159 if (S.isAssignedRegDep() && S.getLatency() == 0 &&
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| H A D | HexagonMachineScheduler.cpp | 86 if (S.getSUnit() == SUu && S.getLatency() > 0)
294 unsigned MinLatency = PI.getLatency();
313 unsigned MinLatency = I->getLatency();
708 PI.getLatency() == 0 &&
717 SI.getLatency() == 0 &&
733 if (PI.getLatency() > 0 &&
741 if (SI.getLatency() > 0 &&
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| H A D | HexagonSubtarget.cpp | 153 if (SI.getKind() != SDep::Order || SI.getLatency() != 0)
415 Dep.setLatency((Dep.getLatency() + 1) >> 1);
452 F->setLatency(I.getLatency());
476 if (I.isAssignedRegDep() && I.getLatency() == 0 &&
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| H A D | HexagonVLIWPacketizer.cpp | 1863 if ((Pred.getLatency() == 0 && Pred.isAssignedRegDep()) ||
1873 if (Pred.getSUnit() == SUJ && Pred.getLatency() > 1)
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 164 unsigned getLatency() const { return WD->Latency; } function in class:llvm::mca::WriteState
196 return !CyclesLeft || CyclesLeft < getLatency();
420 unsigned getLatency() const { return Desc.MaxLatency; } function in class:llvm::mca::InstructionBase
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGVLIW.cpp | 128 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency());
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| H A D | ResourcePriorityQueue.cpp | 190 unsigned LHSLatency = PQ->getLatency(LHSNum);
191 unsigned RHSLatency = PQ->getLatency(RHSNum);
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| H A D | ScheduleDAGRRList.cpp | 414 PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge->getLatency());
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | 194 static int getLatency(LLVMDisasmContext *DC, const MCInst &Inst) { function
231 int Latency = getLatency(DC, Inst);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNILPSched.cpp | 283 PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge.getLatency());
|