Searched refs:c5 (Results 1 - 16 of 16) sorted by relevance

/freebsd-11-stable/sys/arm/arm/
H A Dcpufunc_asm_arm11x6.S69 mcr p15, 0, Rtmp1, c7, c5, 0 /* Invalidate Entire I cache */
83 mcr p15, 0, Rtmp1, c7, c5, 0; /* Nuke Whole Icache */ \
84 mcr p15, 0, Rtmp1, c7, c5, 0; /* Nuke Whole Icache */ \
85 mcr p15, 0, Rtmp1, c7, c5, 0; /* Nuke Whole Icache */ \
86 mcr p15, 0, Rtmp1, c7, c5, 0; /* Nuke Whole Icache */ \
144 mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */
147 mcrr p15, 0, r1, r0, c5 /* invalidate I-cache range */
171 mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */
174 mcrr p15, 0, r1, r0, c5 /* invalidate I-cache range */
H A Dcpufunc_asm_fa526.S44 mcr p15, 0, r1, c7, c5, 0 /* invalidate I$ */
45 mcr p15, 0, r1, c7, c5, 6 /* invalidate BTB */
81 mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ */
156 mcr p15, 0, r0, c7, c5, 1 /* invalidate I$ entry */
174 mcr p15, 0, r0, c7, c5, 1 /* invalidate I$ entry */
184 mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ */
H A Dcpufunc_asm_armv5_ec.S60 mcr p15, 0, r0, c7, c5, 0 /* Invalidate ICache */
87 mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
101 mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
187 mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
203 mcr p15, 0, r0, c7, c5, 0 /* Invalidate ICache */
H A Dcpufunc_asm_xscale.S119 mcrne p15, 0, r0, c7, c5, 6 /* Invalidate the BTB */
140 mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
154 mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
170 mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
183 mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
193 mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
296 mcr p15, 0, r0, c7, c5, 0 /* flush I cache (D cleaned below) */
345 mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
395 mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
437 mcr p15, 0, r0, c7, c5,
[all...]
H A Dcpufunc_asm_arm9.S59 mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
82 mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
95 mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
180 mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
195 mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
H A Dcpufunc_asm_arm11.S45 mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
H A Dcpufunc_asm_armv6.S103 mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
H A Dcpufunc_asm_xscale_c3.S137 mcr p15, 0, r0, c7, c5, 0 /* flush I cache (D cleaned below) */
177 mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
198 mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
347 mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
H A Dcpufunc_asm.S60 * c5 - Fault status
81 mrc p15, 0, r0, c5, c0, 0
H A Dcpufunc_asm_sheeva.S50 mcr p15, 0, r1, c7, c5, 0 /* Invalidate ICache */
145 mcr p15, 0, r0, c7, c5, 1
/freebsd-11-stable/lib/libmp/tests/
H A Dlegacy_test.c35 MINT *c0, *c1, *c2, *c3, *c5, *c6, *c8, *c10, *c14, *c15, *c25, \ variable
82 testmcmp(t0, c5, "gcd0");
90 testmcmp(t0, c5, "msqrt0");
103 mp_mdiv(c42, c5, t0, t1);
128 mp_mult(c5, c2, t0);
167 c5 = mp_itom(5);
196 mp_mfree(c5);
/freebsd-11-stable/sys/arm/include/
H A Dsysreg.h54 #define CP14_DBGPRSR(rr) p14, 0, rr, c1, c5, 4 /* Device Powerdown and Reset Status */
118 #define CP15_DFSR(rr) p15, 0, rr, c5, c0, 0 /* Data Fault Status Register */
122 #define CP15_IFSR(rr) p15, 0, rr, c5, c0, 1 /* Instruction Fault Status Register */
126 #define CP15_ADFSR(rr) p15, 0, rr, c5, c1, 0 /* Auxiliary Data Fault Status Register */
127 #define CP15_AIFSR(rr) p15, 0, rr, c5, c1, 1 /* Auxiliary Instruction Fault Status Register */
151 #define CP15_ICIALLU p15, 0, r0, c7, c5, 0 /* Instruction cache invalidate all PoU */
152 #define CP15_ICIMVAU(rr) p15, 0, rr, c7, c5, 1 /* Instruction cache invalidate */
155 #define CP15_CP15ISB p15, 0, r0, c7, c5, 4 /* ISB */
157 #define CP15_BPIALL p15, 0, r0, c7, c5, 6 /* Branch predictor invalidate all */
158 #define CP15_BPIMVA p15, 0, rr, c7, c5,
[all...]
/freebsd-11-stable/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/usdt/
H A Dtst.entryreturn.ksh112 script | cut -c5-
/freebsd-11-stable/contrib/libucl/src/
H A Ducl_hash.c130 unsigned char c1, c2, c3, c4, c5, c6, c7, c8; member in struct:__anon2135::__anon2136
141 u.c.c5 = s[i + 4], u.c.c6 = s[i + 5], u.c.c7 = s[i + 6], u.c.c8 = s[i + 7];
146 u.c.c1 = lc_map[u.c.c5];
160 u.c.c5 = lc_map[(unsigned char)s[i++]];
/freebsd-11-stable/crypto/openssl/crypto/whrlpool/
H A Dwp_block.c156 # define LL(c0,c1,c2,c3,c4,c5,c6,c7) c0,c1,c2,c3,c4,c5,c6,c7
167 # define LL(c0,c1,c2,c3,c4,c5,c6,c7) c0,c1,c2,c3,c4,c5,c6,c7, \
168 c7,c0,c1,c2,c3,c4,c5,c6, \
169 c6,c7,c0,c1,c2,c3,c4,c5, \
170 c5,c6,c7,c0,c1,c2,c3,c4, \
171 c4,c5,c6,c7,c0,c1,c2,c3, \
172 c3,c4,c5,c6,c7,c0,c1,c2, \
173 c2,c3,c4,c5,c
[all...]
/freebsd-11-stable/contrib/amd/doc/
H A Dtexinfo.tex8953 \gdef^^c5{\ringaccent A}
9073 \gdef^^c5{\'L}

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