/freebsd-11-stable/sys/arm/nvidia/tegra124/ |
H A D | tegra124_clk_super.c | 50 uint32_t base_reg; member in struct:super_mux_def 64 .base_reg = r, \ 101 uint32_t base_reg; member in struct:super_mux_sc 163 RD4(sc, sc->base_reg, ®); 201 RD4(sc, sc->base_reg, ®); 214 WR4(sc, sc->base_reg, reg); 215 RD4(sc, sc->base_reg, &dummy); 218 WR4(sc, sc->base_reg, reg); 219 RD4(sc, sc->base_reg, &dummy); 225 WR4(sc, sc->base_reg, re [all...] |
H A D | tegra124_clk_pll.c | 108 uint32_t base_reg; member in struct:clk_pll_def 223 .base_reg = PLLM_BASE, 234 .base_reg = PLLX_BASE, 247 .base_reg = PLLC_BASE, 260 .base_reg = PLLC2_BASE, 271 .base_reg = PLLC3_BASE, 282 .base_reg = PLLC4_BASE, 295 .base_reg = PLLP_BASE, 305 .base_reg = PLLA_BASE, 315 .base_reg 391 uint32_t base_reg; member in struct:pll_sc [all...] |
H A D | tegra124_clk_per.c | 65 uint32_t base_reg; member in struct:periph_def 401 .base_reg = r, \ 527 uint32_t base_reg; member in struct:periph_sc 559 MD4(sc, sc->base_reg, PERLCK_ENA_MASK, PERLCK_ENA_MASK); 561 RD4(sc, sc->base_reg, ®); 602 RD4(sc, sc->base_reg, ®); 617 WR4(sc, sc->base_reg, reg); 633 RD4(sc, sc->base_reg, ®); 667 MD4(sc, sc->base_reg, sc->div_mask, 689 sc->base_reg 761 uint32_t reg, mask, base_reg; local [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/include/lldb/Core/ |
H A D | EmulateInstruction.h | 194 RegisterInfo base_reg; // base register number member in struct:lldb_private::EmulateInstruction::Context::__anon1370::RegisterPlusIndirectOffset 200 RegisterInfo base_reg; // base register for address calculation member in struct:lldb_private::EmulateInstruction::Context::__anon1370::RegisterToRegisterPlusOffset 205 RegisterInfo base_reg; // base register for address calculation member in struct:lldb_private::EmulateInstruction::Context::__anon1370::RegisterToRegisterPlusIndirectOffset 242 void SetRegisterPlusOffset(RegisterInfo base_reg, int64_t signed_offset) { argument 244 info.RegisterPlusOffset.reg = base_reg; 248 void SetRegisterPlusIndirectOffset(RegisterInfo base_reg, argument 251 info.RegisterPlusIndirectOffset.base_reg = base_reg; 256 RegisterInfo base_reg, 260 info.RegisterToRegisterPlusOffset.base_reg 255 SetRegisterToRegisterPlusOffset(RegisterInfo data_reg, RegisterInfo base_reg, int64_t offset) argument 264 SetRegisterToRegisterPlusIndirectOffset(RegisterInfo base_reg, RegisterInfo offset_reg, RegisterInfo data_reg) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 4541 RegisterInfo base_reg; local 4542 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + Rn, base_reg); 4550 ctx.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base)); 4553 ctx.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base)); 4564 context.SetRegisterPlusOffset(base_reg, (int32_t)(offset_addr - base)); 4677 RegisterInfo base_reg; local 4678 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg); 4701 context.SetRegisterToRegisterPlusOffset(data_reg, base_reg, offset); 4799 RegisterInfo base_reg; local 4800 GetRegisterInfo(eRegisterKindDWARF, dwarf_r0 + n, base_reg); 4947 RegisterInfo base_reg; local 5070 RegisterInfo base_reg; local 5261 RegisterInfo base_reg; local 5467 RegisterInfo base_reg; local 5593 RegisterInfo base_reg; local 5763 RegisterInfo base_reg; local 5777 RegisterInfo base_reg; local 6431 RegisterInfo base_reg; local 6637 RegisterInfo base_reg; local 6815 RegisterInfo base_reg; local 7059 RegisterInfo base_reg; local 7196 RegisterInfo base_reg; local 7306 RegisterInfo base_reg; local 7474 RegisterInfo base_reg; local 7633 RegisterInfo base_reg; local 7730 RegisterInfo base_reg; local 7879 RegisterInfo base_reg; local 8031 RegisterInfo base_reg; local 8141 RegisterInfo base_reg; local 8307 RegisterInfo base_reg; local 8789 RegisterInfo base_reg; local 10419 RegisterInfo base_reg; local 10618 RegisterInfo base_reg; local 10764 RegisterInfo base_reg; local 11021 RegisterInfo base_reg; local 11153 RegisterInfo base_reg; local 11330 RegisterInfo base_reg; local 11525 RegisterInfo base_reg; local 11683 RegisterInfo base_reg; local 11818 RegisterInfo base_reg; local 11981 RegisterInfo base_reg; local 12148 RegisterInfo base_reg; local 12314 RegisterInfo base_reg; local 12481 RegisterInfo base_reg; local 12606 RegisterInfo base_reg; local [all...] |
/freebsd-11-stable/contrib/binutils/gas/config/ |
H A D | tc-i386.c | 149 const reg_entry *base_reg; member in struct:_i386_insn 1360 x->base_reg ? x->base_reg->reg_name : "none", 3543 if (i.base_reg == 0) 3575 else /* !i.base_reg && i.index_reg */ 3591 else if (i.base_reg->reg_type == BaseIndex) 3600 else if (i.base_reg->reg_type & Reg16) 3602 switch (i.base_reg->reg_num) 3626 i.rm.regmem = i.base_reg->reg_num - 6 + 4; 3630 else /* i.base_reg an [all...] |
H A D | tc-arm.c | 1576 int base_reg; 1626 base_reg = max_regs; 1653 if (new_base < base_reg) 1654 base_reg = new_base; 1720 *pbase = base_reg; 1723 mask >>= base_reg; 1781 int base_reg = -1; 1806 if (base_reg == -1) 1808 base_reg = getreg; 1818 reg_incr = getreg - base_reg; 1574 int base_reg; local 1721 mask >>= base_reg; local 1779 int base_reg = -1; local 6885 int base_reg = inst.operands[0].reg; local [all...] |
H A D | tc-ia64.c | 4786 int ch, base_reg = 0; local 4792 case DYNREG_GR: base_reg = REG_GR + 32; break; 4793 case DYNREG_FR: base_reg = REG_FR + 32; break; 4794 case DYNREG_PR: base_reg = REG_P + 16; break; 4879 dr->base = base_reg; 4881 base_reg += num_regs;
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/freebsd-11-stable/contrib/gcc/ |
H A D | postreload.c | 1467 rtx base_reg; 1479 base_reg = XEXP (src, 0); 1493 else if (reg_set_luid[REGNO (base_reg)] 1497 && reg_base_reg[REGNO (base_reg)] < 0) 1499 offset = reg_offset[REGNO (base_reg)]; 1500 base_reg = XEXP (src, 1); 1514 base_reg = src; 1534 base_regno = REGNO (base_reg); 1465 rtx base_reg; local
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/SymbolFile/NativePDB/ |
H A D | PdbUtil.cpp | 637 RegisterId base_reg = local 640 if (base_reg == RegisterId::VFRAME) { 651 MakeRegRelLocationExpression(base_reg, loc.Hdr.Offset, module); 661 RegisterId base_reg = (RegisterId)(uint16_t)loc.Hdr.Register; local 663 if (base_reg == RegisterId::VFRAME) { 674 base_reg, loc.Hdr.BasePointerOffset, module);
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Core/ |
H A D | EmulateInstruction.cpp | 453 info.RegisterPlusIndirectOffset.base_reg.name, 459 info.RegisterToRegisterPlusOffset.base_reg.name, 466 info.RegisterToRegisterPlusIndirectOffset.base_reg.name,
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/freebsd-11-stable/contrib/gcc/config/s390/ |
H A D | s390.c | 293 rtx base_reg; local 1667 && base == cfun->machine->base_reg) 1715 && indx == cfun->machine->base_reg) 4941 rtx base = cfun->machine->base_reg; 4957 rtx base = cfun->machine->base_reg; 4974 rtx base = cfun->machine->base_reg; 4990 rtx base = cfun->machine->base_reg; 5003 rtx base = cfun->machine->base_reg; 5097 cfun->machine->base_reg), 5712 rtx base_reg 5711 rtx base_reg = cfun->machine->base_reg; local [all...] |
/freebsd-11-stable/contrib/gcc/config/arm/ |
H A D | arm.c | 4034 rtx base_reg, val; 4057 base_reg = gen_reg_rtx (SImode); 4059 emit_move_insn (base_reg, val); 4060 x = plus_constant (base_reg, low_n); 4091 rtx base_reg; 4107 base_reg = force_reg (SImode, GEN_INT (base)); 4108 x = plus_constant (base_reg, index); 5853 int base_reg = -1; 5895 base_reg = REGNO (reg); 5903 if (base_reg ! 4025 rtx base_reg, val; local 4082 rtx base_reg; local 5842 int base_reg = -1; local 6008 int base_reg; local 6069 int base_reg = -1; local 6197 int base_reg; local 8497 vfp_emit_fstmx(int base_reg, int count) argument 10370 emit_sfm(int base_reg, int count) argument [all...] |
/freebsd-11-stable/sys/dev/ntb/ntb_hw/ |
H A D | ntb_hw_intel.c | 1691 uint32_t base_reg, lmt_reg; local 1693 bar_get_xlat_params(ntb, idx, &base_reg, NULL, &lmt_reg); 1702 intel_ntb_reg_write(4, base_reg, bar_addr); 1703 reg_val = intel_ntb_reg_read(4, base_reg); 1710 intel_ntb_reg_write(8, base_reg, bar_addr); 1711 reg_val = intel_ntb_reg_read(8, base_reg); 2846 uint32_t base_reg, xlat_reg, limit_reg; local 2869 bar_get_xlat_params(ntb, bar_num, &base_reg, &xlat_reg, &limit_reg); 2873 base = intel_ntb_reg_read(8, base_reg) & BAR_HIGH_MASK; 2902 base = intel_ntb_reg_read(4, base_reg) [all...] |
/freebsd-11-stable/sys/dev/bxe/ |
H A D | ecore_init_ops.h | 904 uint32_t base_reg, uint32_t reg) 909 REG_WR(sc, base_reg + i*4, 903 ecore_qm_set_ptr_table(struct bxe_softc *sc, int qm_cid_count, uint32_t base_reg, uint32_t reg) argument
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/freebsd-11-stable/contrib/gcc/config/i386/ |
H A D | i386.c | 6127 rtx base_reg, index_reg; 6229 base_reg = base && GET_CODE (base) == SUBREG ? SUBREG_REG (base) : base; 6233 if (base_reg && index_reg && scale == 1 6240 tmp = base_reg, base_reg = index_reg, index_reg = tmp; 6244 if ((base_reg == hard_frame_pointer_rtx 6245 || base_reg == frame_pointer_rtx 6246 || base_reg == arg_pointer_rtx) && !disp) 6252 && base_reg && !index_reg && !disp 6253 && REG_P (base_reg) 6113 rtx base_reg, index_reg; local [all...] |