Searched refs:VECREDUCE_UMAX (Results 1 - 12 of 12) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 939 VECREDUCE_SMAX, VECREDUCE_SMIN, VECREDUCE_UMAX, VECREDUCE_UMIN, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 447 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
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H A D | LegalizeVectorOps.cpp | 481 case ISD::VECREDUCE_UMAX: 985 case ISD::VECREDUCE_UMAX:
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H A D | LegalizeVectorTypes.cpp | 613 case ISD::VECREDUCE_UMAX: 1993 case ISD::VECREDUCE_UMAX: 2079 case ISD::VECREDUCE_UMAX: CombineOpc = ISD::UMAX; break; 4234 case ISD::VECREDUCE_UMAX: 4693 case ISD::VECREDUCE_UMAX:
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H A D | LegalizeIntegerTypes.cpp | 197 case ISD::VECREDUCE_UMAX: 1332 case ISD::VECREDUCE_UMAX: 1759 case ISD::VECREDUCE_UMAX: 1938 case ISD::VECREDUCE_UMAX:
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H A D | LegalizeDAG.cpp | 1157 case ISD::VECREDUCE_UMAX: 3806 case ISD::VECREDUCE_UMAX:
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H A D | TargetLowering.cpp | 7624 case ISD::VECREDUCE_UMAX: BaseOpcode = ISD::UMAX; break;
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H A D | DAGCombiner.cpp | 1629 case ISD::VECREDUCE_UMAX: 19762 ? ISD::VECREDUCE_UMIN : ISD::VECREDUCE_UMAX;
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H A D | SelectionDAGBuilder.cpp | 9002 Res = DAG.getNode(ISD::VECREDUCE_UMAX, dl, VT, Op1);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 721 setOperationAction(ISD::VECREDUCE_UMAX, VT, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 786 setOperationAction(ISD::VECREDUCE_UMAX, VT, Custom); 3271 case ISD::VECREDUCE_UMAX: 8553 case ISD::VECREDUCE_UMAX: 12935 case ISD::VECREDUCE_UMAX:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 292 setOperationAction(ISD::VECREDUCE_UMAX, VT, Legal);
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