Searched refs:VECREDUCE_FMAX (Results 1 - 10 of 10) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h933 VECREDUCE_FMAX, VECREDUCE_FMIN, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp449 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
H A DLegalizeVectorOps.cpp485 case ISD::VECREDUCE_FMAX:
989 case ISD::VECREDUCE_FMAX:
H A DLegalizeVectorTypes.cpp615 case ISD::VECREDUCE_FMAX:
1995 case ISD::VECREDUCE_FMAX:
2081 case ISD::VECREDUCE_FMAX:
4236 case ISD::VECREDUCE_FMAX:
4717 case ISD::VECREDUCE_FMAX:
H A DLegalizeDAG.cpp1159 case ISD::VECREDUCE_FMAX:
3808 case ISD::VECREDUCE_FMAX:
H A DTargetLowering.cpp7626 case ISD::VECREDUCE_FMAX:
H A DSelectionDAGBuilder.cpp9008 Res = DAG.getNode(ISD::VECREDUCE_FMAX, dl, VT, Op1);
H A DDAGCombiner.cpp1631 case ISD::VECREDUCE_FMAX:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp723 setOperationAction(ISD::VECREDUCE_FMAX, VT, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp797 setOperationAction(ISD::VECREDUCE_FMAX, VT, Custom);
3273 case ISD::VECREDUCE_FMAX:
8557 case ISD::VECREDUCE_FMAX: {

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