/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64StackTaggingPreRA.cpp | 176 MachineInstr *UseI = &*(UI++); local 177 if (isUncheckedLoadOrStoreOpcode(UseI->getOpcode())) { 179 unsigned OpIdx = TII->getLoadStoreImmIdx(UseI->getOpcode()) - 1; 180 if (UseI->getOperand(OpIdx).isReg() && 181 UseI->getOperand(OpIdx).getReg() == TaggedReg) { 182 UseI->getOperand(OpIdx).ChangeToFrameIndex(FI); 183 UseI->getOperand(OpIdx).setTargetFlags(AArch64II::MO_TAGGED); 185 } else if (UseI->isCopy() && 186 Register::isVirtualRegister(UseI->getOperand(0).getReg())) { 187 uncheckUsesOf(UseI [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MIRCanonicalizerPass.cpp | 243 MachineBasicBlock::iterator UseI = BBE; local 247 if (DefI != BBE && UseI != BBE) 256 UseI = BBI; 261 if (DefI == BBE || UseI == BBE) 268 UseI->dump(); 273 MBB->splice(UseI, MBB, DefI); 279 auto UseI = local 283 if (UseI == MBB->instr_end()) 290 [&]() -> MachineBasicBlock::iterator { return UseI; });
|
H A D | MachineCopyPropagation.cpp | 284 const MachineInstr &UseI, unsigned UseIdx); 286 const MachineInstr &UseI, 386 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { 390 UseI.getRegClassConstraint(UseIdx, TII, TRI)) 393 // We don't process further if UseI is a COPY, since forward copy propagation 399 /// \param UseI based on the physical register class constraints of the opcode 402 const MachineInstr &UseI, 410 UseI.getRegClassConstraint(UseIdx, TII, TRI)) 413 if (!UseI.isCopy()) 422 /// RegClassB = COPY RegClassA // UseI paramete 385 isBackwardPropagatableRegClassCopy( const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) argument 401 isForwardableRegClassCopy(const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) argument [all...] |
H A D | SplitKit.cpp | 220 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE; local 221 UseI = UseSlots.begin(); 236 if (UseI == UseE || *UseI >= Stop) { 245 BI.FirstInstr = *UseI; 247 do ++UseI; 248 while (UseI != UseE && *UseI < Stop); 249 BI.LastInstr = UseI[-1];
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600EmitClauseMarkers.cpp | 210 for (MachineBasicBlock::iterator UseI = Def; UseI != BBEnd; ++UseI) { 211 AluInstCount += OccupiedDwords(*UseI); 213 if (!SubstituteKCacheBank(*UseI, KCacheBanks, false)) 228 if (UseI->readsRegister(MOI->getReg(), &TRI)) 232 if (UseI != Def && UseI->killsRegister(MOI->getReg(), &TRI))
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSplitDouble.cpp | 253 MachineInstr *UseI = Op.getParent(); local 254 if (isFixedInstr(UseI)) 256 for (unsigned i = 0, n = UseI->getNumOperands(); i < n; ++i) { 257 MachineOperand &MO = UseI->getOperand(i); 438 MachineInstr *UseI = U->getParent(); local 439 if (isFixedInstr(UseI)) { 442 for (auto &Op : UseI->operands()) { 453 if (UseI->isPHI()) { 454 const MachineBasicBlock *PB = UseI->getParent(); 460 int32_t P = profit(UseI); [all...] |
H A D | BitTracker.cpp | 985 for (MachineInstr &UseI : MRI.use_nodbg_instructions(Reg)) 986 UseQ.push(&UseI); 1104 MachineInstr &UseI = *UseQ.front(); 1107 if (!InstrExec.count(&UseI)) 1109 if (UseI.isPHI()) 1110 visitPHI(UseI); 1111 else if (!UseI.isBranch()) 1112 visitNonBranch(UseI); 1114 visitBranchesFrom(UseI);
|
H A D | HexagonLoopIdiomRecognition.cpp | 583 bool classifyInst(Instruction *UseI, ValueSeq &Early, ValueSeq &Late); 1183 bool PolynomialMultiplyRecognize::classifyInst(Instruction *UseI, argument 1188 if (UseI->getOpcode() == Instruction::Select) { 1189 Value *TV = UseI->getOperand(1), *FV = UseI->getOperand(2); 1193 Early.insert(UseI); 1197 Late.insert(UseI); 1204 if (UseI->getNumOperands() == 0) 1208 for (auto &I : UseI->operands()) { 1229 Early.insert(UseI); 2339 Instruction *UseI = dyn_cast<Instruction>(K); local [all...] |
H A D | HexagonBitSimplify.cpp | 975 MachineInstr *UseI = I->getParent(); 976 if (UseI->isDebugValue()) 978 if (UseI->isPHI()) { 979 assert(!UseI->getOperand(0).getSubReg()); 980 Register DR = UseI->getOperand(0).getReg(); 1219 MachineInstr &UseI = *I->getParent(); 1220 if (UseI.isPHI() || UseI.isCopy()) { 1221 Register DefR = UseI.getOperand(0).getReg(); 1226 if (!computeUsedBits(UseI, [all...] |
H A D | HexagonGenPredicate.cpp | 239 MachineInstr *UseI = I->getParent(); local 240 if (isConvertibleToPredForm(UseI)) 241 PUsers.insert(UseI);
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CmovConversion.cpp | 323 [&](MachineInstr &UseI) { 324 return UseI.getOpcode() == X86::SUBREG_TO_REG;
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | LoopRotationUtils.cpp | 574 for (User *UseI : IVOpnd->users()) { 575 auto *UserInst = cast<Instruction>(UseI);
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | IndVarSimplify.cpp | 1033 Instruction *UseI) { 1034 DefUserPair Key(Def, UseI); 1044 void updatePostIncRangeInfo(Value *Def, Instruction *UseI, ConstantRange R) { argument 1045 DefUserPair Key(Def, UseI); 1032 getPostIncRangeInfo(Value *Def, Instruction *UseI) argument
|
H A D | LoopStrengthReduce.cpp | 3112 auto UseI = find(Inc.UserInst->operands(), Inc.IVOperand); local 3113 assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand"); 3114 IVIncSet.insert(UseI); 3248 User::op_iterator UseI = local 3250 assert(UseI != UserInst->op_end() && "cannot find IV operand"); 3251 if (IVIncSet.count(UseI)) { 3252 LLVM_DEBUG(dbgs() << "Use is in profitable chain: " << **UseI << '\n');
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | LazyValueInfo.cpp | 2033 if (auto *UseI = dyn_cast<Instruction>(U)) 2034 if (!isa<PHINode>(UseI) || DT.dominates(ParentBB, UseI->getParent())) 2035 printResult(UseI->getParent());
|