/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 244 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, 247 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, 249 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, 251 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, 253 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, 255 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, 257 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, 259 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, 261 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, 263 { ISD::UINT_TO_FP, MV [all...] |
H A D | ARMISelLowering.cpp | 173 setOperationAction(ISD::UINT_TO_FP, VT, Custom); 178 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 298 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 860 // Neon does not have single instruction SINT_TO_FP and UINT_TO_FP with 866 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); 867 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom); 978 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 5471 case ISD::UINT_TO_FP: 5473 Opc = ISD::UINT_TO_FP; 9307 case ISD::UINT_TO_FP [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TargetTransformInfo.cpp | 1310 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 1 }, 1311 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, 1312 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i64, 1 }, 1313 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i64, 1 }, 1314 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 }, 1315 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 }, 1368 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i1, 4 }, 1369 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 }, 1370 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 2 }, 1371 { ISD::UINT_TO_FP, MV [all...] |
H A D | X86IntrinsicsInfo.h | 924 X86_INTRINSIC_DATA(avx512_uitofp_round, INTR_TYPE_1OP, ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
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H A D | X86ISelLowering.cpp | 216 // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this 218 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); 220 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); 224 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 228 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 803 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 984 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); 987 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom); 990 // Fast v2f32 UINT_TO_FP( v2i32 ) custom conversion. 993 setOperationAction(ISD::UINT_TO_FP, MV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 329 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, 330 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, 331 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, 337 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, 338 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, 339 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, 344 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, 345 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, 350 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 10 }, 351 { ISD::UINT_TO_FP, MV [all...] |
H A D | AArch64ISelLowering.cpp | 302 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 303 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 304 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); 636 setTargetDAGCombine(ISD::UINT_TO_FP); 734 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); 741 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v4i8, MVT::v4i32); 745 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i8, MVT::v8i32); 748 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); 750 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom); 754 setOperationAction(ISD::UINT_TO_FP, MV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 540 UINT_TO_FP, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 473 case ISD::UINT_TO_FP: 560 case ISD::UINT_TO_FP: 632 unsigned Opc = (Node->getOpcode() == ISD::UINT_TO_FP || 872 case ISD::UINT_TO_FP: 1352 "Elements in vector-UINT_TO_FP must be 32 or 64 bits wide");
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H A D | SelectionDAGDumper.cpp | 335 case ISD::UINT_TO_FP: return "uint_to_fp";
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H A D | LegalizeVectorTypes.cpp | 102 case ISD::UINT_TO_FP: 574 case ISD::UINT_TO_FP: 895 case ISD::UINT_TO_FP: 1954 case ISD::UINT_TO_FP: 2799 case ISD::UINT_TO_FP: 4219 case ISD::UINT_TO_FP:
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H A D | LegalizeFloatTypes.cpp | 131 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; 1183 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; 1607 llvm_unreachable("Unsupported UINT_TO_FP!"); 2148 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
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H A D | LegalizeDAG.cpp | 1003 case ISD::UINT_TO_FP: 2489 /// legal for the target, and that there is a legal UINT_TO_FP or SINT_TO_FP 2498 unsigned UIntOp = IsStrict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP; 2519 // If the target supports UINT_TO_FP of this type, use it. 2959 case ISD::UINT_TO_FP: 4222 if (Node->getOpcode() == ISD::UINT_TO_FP || 4285 case ISD::UINT_TO_FP:
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H A D | LegalizeIntegerTypes.cpp | 1297 case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break; 3785 case ISD::UINT_TO_FP: Res = ExpandIntOp_UINT_TO_FP(N); break; 4177 "Don't know how to expand this UINT_TO_FP!");
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H A D | SelectionDAG.cpp | 4133 case ISD::UINT_TO_FP: 4397 case ISD::UINT_TO_FP: 4536 case ISD::UINT_TO_FP: 4587 case ISD::UINT_TO_FP:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 223 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); 224 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1, 228 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); 395 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); 402 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); 533 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); 554 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 560 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 730 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); 882 setOperationAction(ISD::UINT_TO_FP, MV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 340 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 377 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 1149 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); 1549 ISD::NodeType ToFp = Sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP; 1680 SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo); 1681 SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi); 2493 SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP, 2496 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); 2518 return DAG.getNode(ISD::UINT_TO_FP, DL, DestVT, Ext);
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H A D | R600ISelLowering.cpp | 1851 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { 1852 return DAG.getNode(ISD::UINT_TO_FP, DL, N->getValueType(0),
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H A D | SIISelLowering.cpp | 506 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Custom); 511 setOperationAction(ISD::UINT_TO_FP, MVT::f16, Promote); 736 setTargetDAGCombine(ISD::UINT_TO_FP); 8601 case ISD::UINT_TO_FP: 8732 if (VT == MVT::f32 && (N0.getOpcode() == ISD::UINT_TO_FP || 10074 case ISD::UINT_TO_FP:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1516 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 1518 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 3025 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG, *this, 3372 case ISD::UINT_TO_FP:
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 264 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); 265 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); 405 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); 406 setOperationAction(ISD::UINT_TO_FP, MVT::v2f64, Legal); 425 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); 426 setOperationAction(ISD::UINT_TO_FP, MVT::v4f32, Legal);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1597 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); 1598 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); 1599 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1625 case UIToFP: return ISD::UINT_TO_FP;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 359 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); 1872 return DAG.getNode(ISD::UINT_TO_FP, DL, Op->getValueType(0),
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H A D | MipsISelLowering.cpp | 409 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); 410 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
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