Searched refs:TSFlags (Results 1 - 25 of 66) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h334 return MI.getDesc().TSFlags & SIInstrFlags::SALU;
338 return get(Opcode).TSFlags & SIInstrFlags::SALU;
342 return MI.getDesc().TSFlags & SIInstrFlags::VALU;
346 return get(Opcode).TSFlags & SIInstrFlags::VALU;
358 return MI.getDesc().TSFlags & SIInstrFlags::SOP1;
362 return get(Opcode).TSFlags & SIInstrFlags::SOP1;
366 return MI.getDesc().TSFlags & SIInstrFlags::SOP2;
370 return get(Opcode).TSFlags & SIInstrFlags::SOP2;
374 return MI.getDesc().TSFlags & SIInstrFlags::SOPC;
378 return get(Opcode).TSFlags
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H A DR600Defines.h61 #define IS_VTX(desc) ((desc).TSFlags & R600_InstFlag::VTX_INST)
62 #define IS_TEX(desc) ((desc).TSFlags & R600_InstFlag::TEX_INST)
H A DR600InstrInfo.h318 return get(MI.getOpcode()).TSFlags & R600InstrFlags::REGISTER_STORE;
322 return get(MI.getOpcode()).TSFlags & R600InstrFlags::REGISTER_LOAD;
H A DR600OptimizeVectorRegisters.cpp153 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST)
267 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST)
352 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST) {
H A DSIMemoryLegalizer.cpp577 assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
591 assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
605 assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
638 assert(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic);
1292 if (!(MI->getDesc().TSFlags & SIInstrFlags::maybeAtomic))
H A DR600InstrInfo.cpp58 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR;
134 unsigned TargetFlags = get(Opcode).TSFlags;
140 unsigned TargetFlags = get(Opcode).TSFlags;
148 unsigned TargetFlags = get(Opcode).TSFlags;
196 return (get(Opcode).TSFlags & R600_InstFlag::IS_EXPORT);
1402 unsigned TargetFlags = get(MI.getOpcode()).TSFlags;
1467 unsigned TargetFlags = get(MI.getOpcode()).TSFlags;
1488 unsigned TargetFlags = get(MI.getOpcode()).TSFlags;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp110 uint64_t TSFlags, bool Rex, unsigned &CurByte,
114 void emitPrefixImpl(uint64_t TSFlags, unsigned &CurOp, unsigned &CurByte,
118 void emitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
125 bool emitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
129 uint8_t determineREXPrefix(const MCInst &MI, uint64_t TSFlags, int MemOperand,
141 static bool isCDisp8(uint64_t TSFlags, int Value, int &CValue) {
142 assert(((TSFlags & X86II::EncodingMask) == X86II::EVEX) &&
146 (TSFlags & X86II::CD8_Scale_Mask) >> X86II::CD8_Scale_Shift;
165 /// instruction with the specified TSFlags.
166 static MCFixupKind getImmFixupKind(uint64_t TSFlags) {
368 emitMemModRMByte(const MCInst &MI, unsigned Op, unsigned RegOpcodeField, uint64_t TSFlags, bool Rex, unsigned &CurByte, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
635 emitPrefixImpl(uint64_t TSFlags, unsigned &CurOp, unsigned &CurByte, bool &Rex, const MCInst &MI, const MCInstrDesc &Desc, const MCSubtargetInfo &STI, raw_ostream &OS) const argument
739 emitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand, const MCInst &MI, const MCInstrDesc &Desc, raw_ostream &OS) const argument
1169 determineREXPrefix(const MCInst &MI, uint64_t TSFlags, int MemOperand, const MCInstrDesc &Desc) const argument
1295 emitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand, const MCInst &MI, const MCInstrDesc &Desc, const MCSubtargetInfo &STI, raw_ostream &OS) const argument
1362 uint64_t TSFlags = Desc.TSFlags; local
1382 uint64_t TSFlags = Desc.TSFlags; local
[all...]
H A DX86IntelInstPrinter.cpp85 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
86 if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS)
88 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD)
142 if (Desc.TSFlags & X86II::EVEX_K) {
152 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
153 if (Desc.TSFlags & X86II::EVEX_B) {
156 if (Desc.TSFlags & X86II::VEX_W)
163 if (Desc.TSFlags & X86II::EVEX_L2)
164 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
165 else if (Desc.TSFlags
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H A DX86ATTInstPrinter.cpp102 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
103 if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XS)
105 else if ((Desc.TSFlags & X86II::OpPrefixMask) == X86II::XD)
160 unsigned CurOp = (Desc.TSFlags & X86II::EVEX_K) ? 3 : 2;
162 if ((Desc.TSFlags & X86II::FormMask) == X86II::MRMSrcMem) {
163 if (Desc.TSFlags & X86II::EVEX_B) {
166 if (Desc.TSFlags & X86II::VEX_W)
173 if (Desc.TSFlags & X86II::EVEX_L2)
174 NumElts = (Desc.TSFlags & X86II::VEX_W) ? 8 : 16;
175 else if (Desc.TSFlags
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H A DX86BaseInfo.h905 inline uint8_t getBaseOpcodeFor(uint64_t TSFlags) { argument
906 return TSFlags >> X86II::OpcodeShift;
909 inline bool hasImm(uint64_t TSFlags) { argument
910 return (TSFlags & X86II::ImmMask) != 0;
913 /// Decode the "size of immediate" field from the TSFlags field of the
915 inline unsigned getSizeOfImm(uint64_t TSFlags) { argument
916 switch (TSFlags & X86II::ImmMask) {
930 /// \returns true if the immediate of the specified instruction's TSFlags
932 inline bool isImmPCRel(uint64_t TSFlags) { argument
933 switch (TSFlags
951 isImmSigned(uint64_t TSFlags) argument
1015 getMemoryOperandNo(uint64_t TSFlags) argument
1136 isKMasked(uint64_t TSFlags) argument
1141 isKMergeMasked(uint64_t TSFlags) argument
[all...]
H A DX86InstPrinterCommon.cpp324 uint64_t TSFlags = Desc.TSFlags; local
327 if ((TSFlags & X86II::LOCK) || (Flags & X86::IP_HAS_LOCK))
330 if ((TSFlags & X86II::NOTRACK) || (Flags & X86::IP_HAS_NOTRACK))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXReplaceImageHandles.cpp83 if (MCID.TSFlags & NVPTXII::IsTexFlag) {
89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) {
95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) {
97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1);
105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) {
112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMHazardRecognizer.cpp22 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
43 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) {
53 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) {
H A DARMBaseRegisterInfo.cpp500 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
686 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
799 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4 ||
800 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode6 ||
801 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7 ||
802 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7s2 ||
803 (MI.getDesc().TSFlags & ARMII::AddrModeMask) ==
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFMA3Info.h97 const X86InstrFMA3Group *getFMA3Group(unsigned Opcode, uint64_t TSFlags);
H A DX86InstrFMA3Info.cpp132 const X86InstrFMA3Group *llvm::getFMA3Group(unsigned Opcode, uint64_t TSFlags) { argument
135 uint8_t BaseOpcode = X86II::getBaseOpcodeFor(TSFlags);
136 bool IsFMA3 = ((TSFlags & X86II::EncodingMask) == X86II::VEX ||
137 (TSFlags & X86II::EncodingMask) == X86II::EVEX) &&
138 (TSFlags & X86II::OpMapMask) == X86II::T8 &&
139 (TSFlags & X86II::OpPrefixMask) == X86II::PD &&
149 if (TSFlags & X86II::EVEX_RC)
151 else if (TSFlags & X86II::EVEX_B)
H A DX86EvexToVex.cpp222 if ((Desc.TSFlags & X86II::EncodingMask) != X86II::EVEX)
228 if (Desc.TSFlags & (X86II::EVEX_K | X86II::EVEX_B))
233 if (Desc.TSFlags & X86II::EVEX_L2)
252 (Desc.TSFlags & X86II::VEX_L) ? makeArrayRef(X86EvexToVex256CompressTable)
H A DX86DiscriminateMemOps.cpp129 if (X86II::getMemoryOperandNo(MI.getDesc().TSFlags) < 0)
H A DX86OptimizeLEAs.cpp346 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags) +
449 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags);
515 int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags);
645 X86II::getMemoryOperandNo(Desc.TSFlags) +
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.cpp211 uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
218 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
286 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
304 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
310 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
316 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
349 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
374 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
393 const uint64_t F = MCII.get(MCI.getOpcode()).TSFlags;
463 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp287 uint64_t TSFlags = MCID.TSFlags; local
289 isFirst = TSFlags & PPCII::PPC970_First;
290 isSingle = TSFlags & PPCII::PPC970_Single;
291 isCracked = TSFlags & PPCII::PPC970_Cracked;
292 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DR600MCCodeEmitter.cpp149 ((Desc.TSFlags & R600_InstFlag::OP1) ||
150 Desc.TSFlags & R600_InstFlag::OP2)) {
176 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp1558 const uint64_t F = MI.getDesc().TSFlags;
2007 const uint64_t F = MI.getDesc().TSFlags;
2031 const uint64_t F = MI.getDesc().TSFlags;
2179 const uint64_t F = MID.TSFlags;
2201 const uint64_t F = MI.getDesc().TSFlags;
2214 const uint64_t F = get(Opcode).TSFlags;
2401 const uint64_t F = MI.getDesc().TSFlags;
2406 const uint64_t F = get(Opcode).TSFlags;
2423 const uint64_t F = MI.getDesc().TSFlags;
2428 const uint64_t F = get(Opcode).TSFlags;
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp364 unsigned CompareFlags = Compare.getDesc().TSFlags;
368 unsigned MIFlags = Desc.TSFlags;
434 unsigned Flags = CCUserMI->getDesc().TSFlags;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp414 const uint64_t F = MID.TSFlags;
420 const uint64_t F = MID.TSFlags;

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