Searched refs:SRI (Results 1 - 14 of 14) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp37 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
38 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
39 if (*SRI == Idx)
49 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
50 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
52 return *SRI;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSchedStrategy.cpp34 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); local
52 SGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF,
53 SRI->getSGPRPressureSet());
54 VGPRCriticalLimit = SRI->getRegPressureSetLimit(DAG->MF,
55 SRI->getVGPRPressureSet());
64 const SIRegisterInfo *SRI,
86 unsigned NewSGPRPressure = Pressure[SRI->getSGPRPressureSet()];
87 unsigned NewVGPRPressure = Pressure[SRI->getVGPRPressureSet()];
112 Cand.RPDelta.Excess = PressureChange(SRI->getVGPRPressureSet());
117 Cand.RPDelta.Excess = PressureChange(SRI
62 initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, const SIRegisterInfo *SRI, unsigned SGPRPressure, unsigned VGPRPressure) argument
146 const SIRegisterInfo *SRI = static_cast<const SIRegisterInfo*>(TRI); local
[all...]
H A DGCNSchedStrategy.h40 const SIRegisterInfo *SRI,
H A DAMDGPUMachineCFGStructurizer.cpp2107 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) {
2108 unsigned SourceReg = (*SRI).first;
2118 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI != SE; ++SRI) {
2119 PHILinearize::PHISourceT Source = *SRI;
2151 for (auto SRI = PHIInfo.sources_begin(DestReg); SRI !
[all...]
H A DSIFoldOperands.cpp436 const SIRegisterInfo &SRI = TII->getRegisterInfo(); local
440 if (!SRI.opCanUseInlineConstant(OpInfo.OperandType) ||
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp79 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid());
80 SRI.isValid(); ++SRI)
81 if (!MCSubRegIterator(*SRI, &RI).isValid())
83 Uses.insert(*SRI);
138 for (MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid());
139 SRI.isValid(); ++SRI) {
140 if (MCSubRegIterator(*SRI, &RI).isValid())
144 if (R == *SRI) {
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DCriticalAntiDepBreaker.cpp266 for (MCSubRegIterator SRI(PhysReg, TRI, true); SRI.isValid(); ++SRI)
267 if (!MO.clobbersPhysReg(*SRI))
299 for (MCSubRegIterator SRI(Reg, TRI, true); SRI.isValid(); ++SRI) {
300 unsigned SubregReg = *SRI;
H A DVirtRegMap.cpp295 LiveInterval::const_iterator &SRI = RangeIterPair.second; local
296 while (SRI != SR->end() && SRI->end <= MBBBegin)
297 ++SRI;
298 if (SRI == SR->end())
300 if (SRI->start <= MBBBegin)
/freebsd-11-stable/stand/kshim/
H A Dkshim.mk5 # Copyright (c) 2014 SRI International
8 # This software was developed by SRI International and the University of
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp137 for (CodeGenSubRegIndex *SRI : SubIdx->ConcatenationOf)
138 assert(SRI->ConcatenationOf.empty() && "No transitive closure?");
319 SubRegMap::const_iterator SRI = Map.find(I->first); local
320 if (SRI == Map.end())
322 // Add I->second as a name for the subreg SRI->second, assuming it is
324 if (SubRegs.count(I->second) || !Orphans.erase(SRI->second))
327 SubRegs.insert(std::make_pair(I->second, SRI->second));
1152 for (CodeGenSubRegIndex &SRI : SubRegIndices) {
1153 SRI.computeConcatTransitiveClosure();
1154 if (!SRI
[all...]
H A DRegisterInfoEmitter.cpp1657 for (const CodeGenSubRegIndex &SRI : RegBank.getSubRegIndices()) {
1658 OS << "SubRegIndex " << SRI.getName() << ":\n";
1659 OS << "\tLaneMask: " << PrintLaneMask(SRI.LaneMask) << '\n';
1660 OS << "\tAllSuperRegsCovered: " << SRI.AllSuperRegsCovered << '\n';
H A DGlobalISelEmitter.cpp2640 SubRegIndexRenderer(unsigned InsnID, const CodeGenSubRegIndex *SRI)
2641 : OperandRenderer(OR_SubRegIndex), InsnID(InsnID), SubRegIdx(SRI) {}
/freebsd-11-stable/stand/usb/
H A Dusbcore.mk5 # Copyright (c) 2014 SRI International
8 # This software was developed by SRI International and the University of
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4922 unsigned SRI; local
4925 case 0: SRI = PPC::sub_lt; break;
4926 case 1: SRI = PPC::sub_gt; break;
4927 case 2: SRI = PPC::sub_eq; break;
4928 case 3: SRI = PPC::sub_un; break;
4931 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg);

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