Searched refs:SET_FIELD (Results 1 - 14 of 14) sorted by relevance

/freebsd-11-stable/contrib/elftoolchain/libdwarf/
H A Ddwarf_seterror.c37 #define SET_FIELD(D, R, F) \ macro
50 SET_FIELD(dbg, oldhandler, errhand);
60 SET_FIELD(dbg, oldarg, errarg);
/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Decore_init_fw_funcs.c173 #define QM_CMD_SET_FIELD(var, cmd, field, value) SET_FIELD(var[cmd##_##field##_OFFSET], cmd##_##field, value)
175 #define QM_INIT_TX_PQ_MAP(p_hwfn, map, chip, pq_id, rl_valid, vp_pq_id, rl_id, ext_voq, wrr) OSAL_MEMSET(&map, 0, sizeof(map)); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_PQ_VALID, 1); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_RL_VALID, rl_valid); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_VP_PQ_ID, vp_pq_id); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_RL_ID, rl_id); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_VOQ, ext_voq); SET_FIELD(map.reg, QM_RF_PQ_MAP_##chip##_WRR_WEIGHT_GROUP, wrr); STORE_RT_REG(p_hwfn, QM_REG_TXPQMAP_RT_OFFSET + pq_id, *((u32 *)&map))
1517 SET_FIELD(cam_line, GFT_CAM_LINE_MAPPED_VALID, 1);
1520 SET_FIELD(cam_line, GFT_CAM_LINE_MAPPED_PF_ID_MASK, GFT_CAM_LINE_MAPPED_PF_ID_MASK_MASK);
1521 SET_FIELD(cam_lin
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H A Decore_cxt.c1502 SET_FIELD(cdu_params, CDUC_CXT_SIZE, cxt_size);
1503 SET_FIELD(cdu_params, CDUC_BLOCK_WASTE, block_waste);
1504 SET_FIELD(cdu_params, (u32)CDUC_NCIB, elems_per_page);
1515 SET_FIELD(cdu_params, (u32)CDUT_TYPE0_CXT_SIZE, (cxt_size >> 3));
1516 SET_FIELD(cdu_params, CDUT_TYPE0_BLOCK_WASTE, (block_waste >> 3));
1517 SET_FIELD(cdu_params, CDUT_TYPE0_NCIB, elems_per_page);
1527 SET_FIELD(cdu_params, (u32)CDUT_TYPE1_CXT_SIZE, (cxt_size >> 3));
1528 SET_FIELD(cdu_params, CDUT_TYPE1_BLOCK_WASTE, (block_waste >> 3));
1529 SET_FIELD(cdu_params, CDUT_TYPE1_NCIB, elems_per_page);
1579 SET_FIELD(cdu_seg_param
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H A Decore_hw.c392 SET_FIELD(control, PXP_PRETEND_CMD_IS_CONCRETE, 1);
393 SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_FUNCTION, 1);
398 SET_FIELD(control, PXP_PRETEND_CMD_PORT, 0);
399 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 0);
400 SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_PORT, 1);
419 SET_FIELD(control, PXP_PRETEND_CMD_PORT, port_id);
420 SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 1);
421 SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_PORT, 1);
435 SET_FIELD(control, PXP_PRETEND_CMD_PORT, 0);
436 SET_FIELD(contro
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H A Decore_int.c1452 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_PF_NUMBER, pf_id);
1453 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_VF_NUMBER, vf_number);
1454 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_VF_VALID, vf_valid);
1455 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_SB_TIMESET0, 0x7F);
1456 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_SB_TIMESET1, 0x7F);
1475 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_TIMER_RES0, timer_res);
1483 SET_FIELD(p_sb_entry->params, CAU_SB_ENTRY_TIMER_RES1, timer_res);
1485 SET_FIELD(p_sb_entry->data, CAU_SB_ENTRY_STATE0, cau_state);
1486 SET_FIELD(p_sb_entry->data, CAU_SB_ENTRY_STATE1, cau_state);
1504 SET_FIELD(pi_entr
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H A Decore_l2.c415 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_UCAST_DROP_ALL, 1);
416 SET_FIELD(rx_mode, ETH_VPORT_RX_MODE_MCAST_DROP_ALL, 1);
421 SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_VLAN_MODE,
424 SET_FIELD(tx_err, ETH_TX_ERR_VALS_PACKET_TOO_SMALL,
427 SET_FIELD(tx_err, ETH_TX_ERR_VALS_ANTI_SPOOFING_ERR,
430 SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_INBAND_TAGS,
433 SET_FIELD(tx_err, ETH_TX_ERR_VALS_VLAN_INSERTION_W_INBAND_TAG,
436 SET_FIELD(tx_err, ETH_TX_ERR_VALS_MTU_VIOLATION,
439 SET_FIELD(tx_err, ETH_TX_ERR_VALS_ILLEGAL_CONTROL_FRAME,
531 SET_FIELD(capabilitie
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H A Decore_spq.c292 SET_FIELD(p_cxt->xstorm_ag_context.flags10,
294 SET_FIELD(p_cxt->xstorm_ag_context.flags1,
296 /*SET_FIELD(p_cxt->xstorm_ag_context.flags10,
298 SET_FIELD(p_cxt->xstorm_ag_context.flags9,
629 SET_FIELD(p_db_data->params, CORE_DB_DATA_DEST, DB_DEST_XCM);
630 SET_FIELD(p_db_data->params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_MAX);
631 SET_FIELD(p_db_data->params, CORE_DB_DATA_AGG_VAL_SEL,
H A Decore_dbg_fw_funcs.c4252 SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM, reg->num_entries > 1 || reg->start_entry > 0 ? 1 : 0);
4253 SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id);
4303 SET_FIELD(reg_hdr->data, DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, rule->num_cond_regs + reg_id);
5005 SET_FIELD(dev_data->bus.blocks[BLOCK_DBG].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, 0x1);
5169 SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, enable_mask);
5170 SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_RIGHT_SHIFT, right_shift);
5171 SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_FORCE_VALID_MASK, force_valid_mask);
5172 SET_FIELD(block_bus->data, DBG_BUS_BLOCK_DATA_FORCE_FRAME_MASK, force_frame_mask);
5238 SET_FIELD(dev_data->bus.blocks[BLOCK_DBG].data, DBG_BUS_BLOCK_DATA_ENABLE_MASK, 0x1);
5434 SET_FIELD(bu
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H A Decore_sriov.c923 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
996 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
997 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
998 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
1004 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
1054 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
H A Decore.h111 #define SET_FIELD(value, name, flag) \ macro
H A Decore_dev.c922 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_NON_ROCE, eng_sel);
975 SET_FIELD(val, NIG_REG_PPF_TO_ENGINE_SEL_ROCE, eng_sel);
6464 SET_FIELD(p_coal_timeset->value, COALESCING_TIMESET_TIMESET, timeset);
6465 SET_FIELD(p_coal_timeset->value, COALESCING_TIMESET_VALID, 1);
H A Dqlnx_os.c6997 SET_FIELD(txq->tx_db.data.params,
6999 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
7001 SET_FIELD(txq->tx_db.data.params,
/freebsd-11-stable/sys/mips/rmi/dev/sec/
H A Drmilib.c1008 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_BYPASS);
1013 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_DES);
1017 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_3DES);
1022 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES128);
1027 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES192);
1032 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES256);
1036 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_ARC4);
1037 SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_KEYLEN,
1039 SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_LOADSTATE,
1041 SET_FIELD(ctl_des
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H A Ddesc.h63 #define SET_FIELD(word,field,value) \ macro

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