/freebsd-11-stable/contrib/gcc/config/mips/ |
H A D | crtn.asm | 5 #define RA $7 define 7 #define RA $31 define 12 ld RA,40($sp) 15 lw RA,20($sp) 18 j RA 22 ld RA,40($sp) 25 lw RA,20($sp) 28 j RA
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/freebsd-11-stable/contrib/binutils/opcodes/ |
H A D | ppc-opc.c | 346 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */ 347 #define RA NSI + 1 351 /* As above, but 0 in the RA field means zero, not r0. */ 352 #define RA0 RA + 1 355 /* The RA field in the DQ form lq instruction, which has special 360 /* The RA field in a D or X form instruction which is an updating 361 load, which means that the RA field may not be zero and may not 366 /* The RA field in an lmw instruction, which has special value 371 /* The RA field in a D or X form instruction which is an updating 372 store or an updating floating point load, which means that the RA 345 #define RA macro [all...] |
H A D | alpha-opc.c | 58 /* The RB field when it is the same as the RA field in the same insn. 60 the RA field into the RB field, and the extraction function just 209 #define RA (UNUSED + 1) 211 #define RB (RA + 1) 241 /* The RB field when it must be the same as the RA field. */ 249 /* The RC field when it can *default* to RA. */ 259 /* The FC field when it can *default* to RA. */ 413 #define ARG_BRA { RA, BDISP } 417 #define ARG_MEM { RA, MDISP, PRB } 419 #define ARG_OPR { RA, R 207 #define RA macro [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | RDFDeadCode.cpp | 88 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) { 89 if (!LiveNodes.count(RA.Id)) 90 WorkQ.push_back(RA.Id); 135 auto RA = DFG.addr<RefNode*>(N); local 136 if (DFG.IsDef(RA)) 137 processDef(RA, WorkQ); 139 processUse(RA, WorkQ); 145 auto RA = DFG.addr<RefNode*>(N); local 146 dbgs() << PrintNode<RefNode*>(RA, DFG) << "\n"; 159 for (NodeAddr<RefNode*> RA [all...] |
H A D | HexagonRDFOpt.cpp | 166 for (NodeAddr<RefNode*> RA : SA.Addr->members(DFG)) { 167 R2I.insert(std::make_pair(RA.Id, SA.Id)); 168 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) 201 for (NodeAddr<RefNode*> RA : Refs) 202 OpMap.insert(std::make_pair(RA.Id, getOpNum(RA.Addr->getOp()))); 206 for (NodeAddr<RefNode*> RA : Refs) { 207 unsigned N = OpMap[RA.Id]; 209 RA [all...] |
H A D | RDFCopy.cpp | 90 NodeAddr<RefNode*> RA = L.getNearestAliasedRef(RefRR, IA); local 91 if (RA.Id != 0) { 92 if (RA.Addr->getKind() == NodeAttrs::Def) 93 return RA.Id; 94 assert(RA.Addr->getKind() == NodeAttrs::Use); 95 if (NodeId RD = RA.Addr->getReachingDef())
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetSubtargetInfo.cpp | 21 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, 23 : MCSubtargetInfo(TT, CPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) { 17 TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) argument
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H A D | RDFGraph.cpp | 108 static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA, argument 110 OS << Print<NodeId>(RA.Id, G) << '<' 111 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>'; 112 if (RA.Addr->getFlags() & NodeAttrs::Fixed) 794 NodeAddr<RefNode*> RA = NA; local 795 RA.Addr->setReachingDef(0); 796 RA.Addr->setSibling(0); 892 for (NodeAddr<RefNode*> RA : IA.Addr->members(*this)) 893 AllRefs.insert(RA.Addr->getRegRef(*this)); 1128 // Return the list of all reference nodes related to RA, includin 1195 locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, Predicate P) const argument 1217 getNextShadow(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, bool Create) argument 1704 NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this); local [all...] |
H A D | RDFRegisters.cpp | 131 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { argument 132 assert(Register::isPhysicalRegister(RA.Reg)); 135 MCRegUnitMaskIterator UMA(RA.Reg, &TRI); 139 // Skip units that are masked off in RA. 141 if (PA.second.any() && (PA.second & RA.Mask).none()) {
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RDFRegisters.h | 115 bool alias(RegisterRef RA, RegisterRef RB) const { argument 116 if (!isRegMaskId(RA.Reg)) 117 return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB); 118 return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB); 152 bool aliasRR(RegisterRef RA, RegisterRef RB) const; 166 static bool isCoverOf(RegisterRef RA, RegisterRef RB, argument 168 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB);
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H A D | RDFGraph.h | 10 // for a non-SSA program representation (e.g. post-RA machine code). 755 NodeAddr<RefNode*> RA) const; 757 NodeAddr<RefNode*> RA, bool Create); 759 NodeAddr<RefNode*> RA) const; 761 NodeAddr<RefNode*> RA, bool Create); 763 NodeAddr<RefNode*> RA) const; 766 NodeAddr<RefNode*> RA) const; 842 locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, 864 void removeFromOwner(NodeAddr<RefNode*> RA) { argument 865 NodeAddr<InstrNode*> IA = RA 895 NodeAddr<RefNode*> RA = NA; local [all...] |
H A D | TargetSubtargetInfo.h | 69 const MCReadAdvanceEntry *RA, const InstrStage *IS, 74 // be performed before post-RA scheduling. 232 // be performed before post-RA scheduling. 242 // Provide an ordered list of schedule DAG mutations for the post-RA 259 // to enable post-RA scheduling.
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Transforms/IPO/ |
H A D | DeadArgumentElimination.h | 131 void MarkValue(const RetOrArg &RA, Liveness L, 133 void MarkLive(const RetOrArg &RA); 135 void PropagateLiveness(const RetOrArg &RA);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Object/ |
H A D | RelocationResolver.cpp | 361 int64_t RA = getELFAddend(R); local 366 return (S + RA) & 0xFFFFFFFF; 368 return (S + RA - R.getOffset()) & 0xFFFFFFFF; 370 return S + RA; 372 return (A & 0xC0) | ((S + RA) & 0x3F); 374 return (A & 0xC0) | (((A & 0x3F) - (S + RA)) & 0x3F); 376 return (A + (S + RA)) & 0xFF; 378 return (A - (S + RA)) & 0xFF; 380 return (A + (S + RA)) & 0xFFFF; 382 return (A - (S + RA)) [all...] |
/freebsd-11-stable/sys/mips/mips/ |
H A D | stack_machdep.c | 77 if (insn.IType.rs != SP || insn.IType.rt != RA) 101 if (insn.RType.rs != RA)
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/freebsd-11-stable/lib/libc/mips/gen/ |
H A D | setjmp.S | 70 REG_S ra, CALLFRAME_RA(sp) # save RA 82 REG_L ra, CALLFRAME_RA(sp) # restore RA 151 REG_S ra, CALLFRAME_RA(sp) # save RA
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | DeadArgumentElimination.cpp | 658 /// MarkValue - This function marks the liveness of RA depending on L. If L is 660 /// such that RA will be marked live if any use in MaybeLiveUses gets marked 662 void DeadArgumentEliminationPass::MarkValue(const RetOrArg &RA, Liveness L, argument 666 MarkLive(RA); 672 Uses.insert(std::make_pair(MaybeLiveUse, RA)); 697 void DeadArgumentEliminationPass::MarkLive(const RetOrArg &RA) { argument 698 if (LiveFunctions.count(RA.F)) 701 if (!LiveValues.insert(RA).second) 705 << RA.getDescription() << " live\n"); 706 PropagateLiveness(RA); 711 PropagateLiveness(const RetOrArg &RA) argument [all...] |
/freebsd-11-stable/sys/dev/ixgb/ |
H A D | ixgb_hw.c | 402 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); 403 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); 440 IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); 441 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); 594 IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low); 595 IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
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/freebsd-11-stable/sys/mips/include/ |
H A D | regnum.h | 96 #define RA 31 macro
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | FunctionComparator.cpp | 115 Attribute RA = *RI; local 116 if (LA.isTypeAttribute() && RA.isTypeAttribute()) { 117 if (LA.getKindAsEnum() != RA.getKindAsEnum()) 118 return cmpNumbers(LA.getKindAsEnum(), RA.getKindAsEnum()); 121 Type *TyR = RA.getValueAsType(); 129 if (LA < RA) 131 if (RA < LA) 302 const ConstantArray *RA = cast<ConstantArray>(R); local 309 cast<Constant>(RA->getOperand(i))))
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | FixedLenDecoderEmitter.cpp | 518 void reportRegion(bitAttr_t RA, unsigned StartBit, unsigned BitIndex, 1460 void FilterChooser::reportRegion(bitAttr_t RA, unsigned StartBit, 1462 if (RA == ATTR_MIXED && AllowMixed) 1464 else if (RA == ATTR_ALL_SET && !AllowMixed) 1582 bitAttr_t RA = ATTR_NONE; 1590 switch (RA) { 1597 RA = ATTR_ALL_SET; 1603 RA = ATTR_MIXED; 1612 reportRegion(RA, StartBit, BitIndex, AllowMixed); 1613 RA [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsRegisterInfo.cpp | 42 MipsRegisterInfo::MipsRegisterInfo() : MipsGenRegisterInfo(Mips::RA) {} 223 // Reserve RA if in mips16 mode. 226 Reserved.set(Mips::RA);
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H A D | Mips16FrameLowering.cpp | 120 // Registers RA, S0,S1 are the callee saved registers and they 126 // RA and return address is taken, because it has already been added in 128 // It's killed at the spill, unless the register is RA and return address 131 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA) 145 // Registers RA,S0,S1 are the callee saved registers and they will be restored
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCTargetDesc.cpp | 67 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; local 70 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
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/freebsd-11-stable/contrib/binutils/include/opcode/ |
H A D | cr16.h | 38 era = 14, sp = 15, RA, enumerator in enum:__anon578
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