1/*	$OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $	*/
2
3/*-
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 *	The Regents of the University of California.  All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 4. Neither the name of the University nor the names of its contributors
21 *    may be used to endorse or promote products derived from this software
22 *    without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 *	from: Utah Hdr: reg.h 1.1 90/07/09
37 *	@(#)reg.h	8.2 (Berkeley) 1/11/94
38 *	JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta
39 * $FreeBSD: stable/11/sys/mips/include/regnum.h 351792 2019-09-03 20:19:43Z kevans $
40 */
41
42#ifndef _MACHINE_REGNUM_H_
43#define	_MACHINE_REGNUM_H_
44
45#define	NUMSAVEREGS	40
46#define	NUMFPREGS	34
47
48/*
49 * Location of the saved registers relative to ZERO.
50 * This must match struct trapframe defined in frame.h exactly.
51 * This must also match regdef.h.
52 */
53#if defined(_KERNEL) || defined(_WANT_MIPS_REGNUM)
54#define	ZERO	0
55#define	AST	1
56#define	V0	2
57#define	V1	3
58#define	A0	4
59#define	A1	5
60#define	A2	6
61#define	A3	7
62#if defined(__mips_n32) || defined(__mips_n64)
63#define	A4	8
64#define	A5	9
65#define	A6	10
66#define	A7	11
67#define	T0	12
68#define	T1	13
69#define	T2	14
70#define	T3	15
71#else
72#define	T0	8
73#define	T1	9
74#define	T2	10
75#define	T3	11
76#define	T4	12
77#define	T5	13
78#define	T6	14
79#define	T7	15
80#endif
81#define	S0	16
82#define	S1	17
83#define	S2	18
84#define	S3	19
85#define	S4	20
86#define	S5	21
87#define	S6	22
88#define	S7	23
89#define	T8	24
90#define	T9	25
91#define	K0	26
92#define	K1	27
93#define	GP	28
94#define	SP	29
95#define	S8	30
96#define	RA	31
97#define	SR	32
98#define	PS	SR	/* alias for SR */
99#define	MULLO	33
100#define	MULHI	34
101#define	BADVADDR 35
102#define	CAUSE	36
103#define	PC	37
104/*
105 * IC is valid only on RM7K and RM9K processors. Access to this is
106 * controlled by IC_INT_REG which defined in kernel config
107 */
108#define	IC	38
109#define	DUMMY	39	/* for 8 byte alignment */
110
111/*
112 * Pseudo registers so we save a complete set of registers regardless of
113 * the ABI. See regdef.h for a more complete explanation.
114 */
115#if defined(__mips_n32) || defined(__mips_n64)
116#define	TA0	8
117#define	TA1	9
118#define	TA2	10
119#define	TA3	11
120#else
121#define	TA0	12
122#define	TA1	13
123#define	TA2	14
124#define	TA3	15
125#endif
126
127
128/*
129 * Index of FP registers in 'struct frame', counting from the beginning
130 * of the frame (i.e., including the general registers).
131 */
132#define	FPBASE	NUMSAVEREGS
133#define	F0	(FPBASE+0)
134#define	F1	(FPBASE+1)
135#define	F2	(FPBASE+2)
136#define	F3	(FPBASE+3)
137#define	F4	(FPBASE+4)
138#define	F5	(FPBASE+5)
139#define	F6	(FPBASE+6)
140#define	F7	(FPBASE+7)
141#define	F8	(FPBASE+8)
142#define	F9	(FPBASE+9)
143#define	F10	(FPBASE+10)
144#define	F11	(FPBASE+11)
145#define	F12	(FPBASE+12)
146#define	F13	(FPBASE+13)
147#define	F14	(FPBASE+14)
148#define	F15	(FPBASE+15)
149#define	F16	(FPBASE+16)
150#define	F17	(FPBASE+17)
151#define	F18	(FPBASE+18)
152#define	F19	(FPBASE+19)
153#define	F20	(FPBASE+20)
154#define	F21	(FPBASE+21)
155#define	F22	(FPBASE+22)
156#define	F23	(FPBASE+23)
157#define	F24	(FPBASE+24)
158#define	F25	(FPBASE+25)
159#define	F26	(FPBASE+26)
160#define	F27	(FPBASE+27)
161#define	F28	(FPBASE+28)
162#define	F29	(FPBASE+29)
163#define	F30	(FPBASE+30)
164#define	F31	(FPBASE+31)
165#define	FSR	(FPBASE+32)
166#define FSR_DUMMY (FPBASE+33) /* For 8 byte alignment */
167
168/*
169 * Index of FP registers in 'struct frame', relative to the base
170 * of the FP registers in frame (i.e., *not* including the general
171 * registers).
172 */
173#define	F0_NUM	(0)
174#define	F1_NUM	(1)
175#define	F2_NUM	(2)
176#define	F3_NUM	(3)
177#define	F4_NUM	(4)
178#define	F5_NUM	(5)
179#define	F6_NUM	(6)
180#define	F7_NUM	(7)
181#define	F8_NUM	(8)
182#define	F9_NUM	(9)
183#define	F10_NUM	(10)
184#define	F11_NUM	(11)
185#define	F12_NUM	(12)
186#define	F13_NUM	(13)
187#define	F14_NUM	(14)
188#define	F15_NUM	(15)
189#define	F16_NUM	(16)
190#define	F17_NUM	(17)
191#define	F18_NUM	(18)
192#define	F19_NUM	(19)
193#define	F20_NUM	(20)
194#define	F21_NUM	(21)
195#define	F22_NUM	(22)
196#define	F23_NUM	(23)
197#define	F24_NUM	(24)
198#define	F25_NUM	(25)
199#define	F26_NUM	(26)
200#define	F27_NUM	(27)
201#define	F28_NUM	(28)
202#define	F29_NUM	(29)
203#define	F30_NUM	(30)
204#define	F31_NUM	(31)
205#define	FSR_NUM	(32)
206
207#endif	/* _KERNEL || _WANT_MIPS_REGNUM */
208
209#endif /* !_MACHINE_REGNUM_H_ */
210