Searched refs:PHY_CONTROL (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/sys/arm/cavium/cns11xx/
H A Dif_ecereg.h35 #define PHY_CONTROL 0x00 macro
H A Dif_ece.c197 write_4(sc, PHY_CONTROL, PHY_RW_OK);
198 write_4(sc, PHY_CONTROL,
203 status = read_4(sc, PHY_CONTROL);
207 write_4(sc, PHY_CONTROL, PHY_RW_OK);
220 write_4(sc, PHY_CONTROL, PHY_RW_OK);
221 write_4(sc, PHY_CONTROL,
225 if (read_4(sc, PHY_CONTROL) & PHY_RW_OK) {
229 write_4(sc, PHY_CONTROL, PHY_RW_OK);
/freebsd-11-stable/sys/dev/e1000/
H A De1000_phy.c1654 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
1659 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
1750 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
1756 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
1835 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
1841 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
1955 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &data);
1961 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, data);
2005 * @phy_ctrl: pointer to current value of PHY_CONTROL
2011 * caller must write to the PHY_CONTROL registe
[all...]
H A De1000_80003es2lan.c687 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);
696 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);
H A De1000_defines.h1003 #define PHY_CONTROL 0x00 /* Control Register */ macro
H A Dif_lem.c2592 PHY_CONTROL, &phy_tmp)) {
2596 PHY_CONTROL, phy_tmp);
2608 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2611 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
H A De1000_ich8lan.c2660 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL,

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