Searched refs:OpNum (Results 1 - 25 of 65) sorted by relevance

123

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZInstPrinter.cpp70 static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { argument
71 int64_t Value = MI->getOperand(OpNum).getImm();
77 static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) { argument
78 int64_t Value = MI->getOperand(OpNum).getImm();
83 void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum, argument
85 printUImmOperand<1>(MI, OpNum, O);
88 void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum, argument
90 printUImmOperand<2>(MI, OpNum, O);
93 void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum, argument
95 printUImmOperand<3>(MI, OpNum,
98 printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
103 printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
108 printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
113 printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
118 printU12ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
123 printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
128 printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
133 printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
138 printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
143 printU48ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
148 printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
158 printPCRelTLSOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
181 printOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
186 printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
192 printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
199 printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
210 printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
221 printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O) argument
228 printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O) argument
[all...]
H A DSystemZInstPrinter.h48 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
49 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
50 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
51 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
52 void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
53 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
54 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
55 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
56 void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
57 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostrea
[all...]
H A DSystemZMCCodeEmitter.cpp67 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum,
70 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum,
73 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum,
76 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
79 uint64_t getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum,
82 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum,
85 uint64_t getBDRAddr12Encoding(const MCInst &MI, unsigned OpNum,
88 uint64_t getBDVAddr12Encoding(const MCInst &MI, unsigned OpNum,
92 // Operand OpNum of MI needs a PC-relative fixup of kind Kind at
95 // is always 0. If AllowTLS is true and optional operand OpNum
102 getPC16DBLEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
108 getPC32DBLEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
114 getPC16DBLTLSEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
120 getPC32DBLTLSEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
126 getPC12DBLBPPEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
132 getPC16DBLBPPEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
138 getPC24DBLBPPEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
183 getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
193 getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
203 getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
214 getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
226 getBDLAddr12Len4Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
237 getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
248 getBDRAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
259 getBDVAddr12Encoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const argument
270 getPCRelEncoding(const MCInst &MI, unsigned OpNum, SmallVectorImpl<MCFixup> &Fixups, unsigned Kind, int64_t Offset, bool AllowTLS) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.h47 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
49 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,
52 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,
54 void printAddrModeTBH(const MCInst *MI, unsigned OpNum,
56 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum,
58 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum,
60 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
62 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
65 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum,
67 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
[all...]
H A DARMInstPrinter.cpp351 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, argument
354 const MCOperand &MO1 = MI->getOperand(OpNum);
381 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,
384 const MCOperand &MO1 = MI->getOperand(OpNum);
385 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
386 const MCOperand &MO3 = MI->getOperand(OpNum + 2);
401 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,
404 const MCOperand &MO1 = MI->getOperand(OpNum);
405 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
491 unsigned OpNum,
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.h72 void printAddSubImm(const MCInst *MI, unsigned OpNum,
75 void printLogicalImm(const MCInst *MI, unsigned OpNum,
77 void printShifter(const MCInst *MI, unsigned OpNum,
79 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
81 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
83 void printArithExtend(const MCInst *MI, unsigned OpNum,
86 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
89 void printMemExtend(const MCInst *MI, unsigned OpNum, argument
91 printMemExtend(MI, OpNum, O, SrcRegKind, Width);
94 void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
108 printUImm12Offset(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
114 printAMIndexedWB(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
[all...]
H A DAArch64InstPrinter.cpp733 int OpNum = LdStDesc->ListOperand; local
734 printVectorList(MI, OpNum++, STI, O, "");
737 O << '[' << MI->getOperand(OpNum++).getImm() << ']';
740 unsigned AddrReg = MI->getOperand(OpNum++).getReg();
745 unsigned Reg = MI->getOperand(OpNum++).getReg();
933 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum, argument
936 const MCOperand &MO = MI->getOperand(OpNum);
941 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm());
944 printShifter(MI, OpNum + 1, STI, O);
951 printShifter(MI, OpNum
956 printLogicalImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
964 printShifter(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
976 printShiftedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
983 printExtendedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
990 printArithExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1031 printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, char SrcRegKind, unsigned Width) argument
1040 printRegWithShiftExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1057 printCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1064 printInverseCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1071 printAMNoIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1078 printImmScale(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1084 printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O) argument
1095 printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O) argument
1110 printPrefetchOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1127 printPSBHintOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1138 printBTIHintOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1149 printFPImmOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1241 printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1257 printVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O, StringRef LayoutSuffix) argument
1311 printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1319 printTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1331 printVectorIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1337 printAlignedLabel(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1362 printAdrpLabel(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1469 printSVEPattern(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1480 printSVERegOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1519 printImm8OptLsl(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1544 printSVELogicalImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1563 printZPRasFPR(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1581 printExactFPImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
1590 printGPR64as32(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/
H A DARCInstPrinter.h37 void printMemOperandRI(const MCInst *MI, unsigned OpNum, raw_ostream &O);
38 void printOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
39 void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
40 void printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum,
H A DARCInstPrinter.cpp140 void ARCInstPrinter::printOperand(const MCInst *MI, unsigned OpNum, argument
142 const MCOperand &Op = MI->getOperand(OpNum);
157 void ARCInstPrinter::printMemOperandRI(const MCInst *MI, unsigned OpNum, argument
159 const MCOperand &base = MI->getOperand(OpNum);
160 const MCOperand &offset = MI->getOperand(OpNum + 1);
167 void ARCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, argument
170 const MCOperand &Op = MI->getOperand(OpNum);
175 void ARCInstPrinter::printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum, argument
177 const MCOperand &Op = MI->getOperand(OpNum);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/MCTargetDesc/
H A DNVPTXInstPrinter.h37 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O,
39 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O,
41 void printLdStCode(const MCInst *MI, int OpNum,
43 void printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O,
45 void printMemOperand(const MCInst *MI, int OpNum,
47 void printProtoIdent(const MCInst *MI, int OpNum,
H A DNVPTXInstPrinter.cpp98 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, argument
100 const MCOperand &MO = MI->getOperand(OpNum);
148 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, argument
150 const MCOperand &MO = MI->getOperand(OpNum);
221 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum, argument
224 const MCOperand &MO = MI->getOperand(OpNum);
273 void NVPTXInstPrinter::printMmaCode(const MCInst *MI, int OpNum, raw_ostream &O, argument
275 const MCOperand &MO = MI->getOperand(OpNum);
287 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum, argument
289 printOperand(MI, OpNum,
303 printProtoIdent(const MCInst *MI, int OpNum, raw_ostream &O, const char *Modifier) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRAsmPrinter.cpp48 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
51 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
85 bool AVRAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
89 bool Error = AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
96 const MachineOperand &RegOp = MI->getOperand(OpNum);
104 unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
118 Reg = MI->getOperand(OpNum + RegIdx).getReg();
131 printOperand(MI, OpNum, O);
137 unsigned OpNum, const char *ExtraCode,
143 const MachineOperand &MO = MI->getOperand(OpNum);
136 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430AsmPrinter.cpp52 void printOperand(const MachineInstr *MI, int OpNum,
54 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
78 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
80 const MachineOperand &MO = MI->getOperand(OpNum);
107 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, argument
109 const MachineOperand &Base = MI->getOperand(OpNum);
110 const MachineOperand &Disp = MI->getOperand(OpNum+1);
117 printOperand(MI, OpNum+1, O, "nohash");
122 printOperand(MI, OpNum, O);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFAsmPrinter.cpp45 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
48 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
72 void BPFAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, argument
74 const MachineOperand &MO = MI->getOperand(OpNum);
120 unsigned OpNum, const char *ExtraCode,
122 assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");
123 const MachineOperand &BaseMO = MI->getOperand(OpNum);
124 const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
119 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRDFOpt.cpp96 void removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum);
189 void HexagonDCE::removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum) { argument
204 MI->RemoveOperand(OpNum);
208 if (N < OpNum)
210 else if (N > OpNum)
224 unsigned OpNum, NewOpc; local
228 OpNum = 1;
232 OpNum = 1;
236 OpNum = 1;
240 OpNum
[all...]
H A DHexagonSubtarget.cpp350 for (unsigned OpNum = 0; OpNum < DDst->getNumOperands(); OpNum++) {
351 const MachineOperand &MO = DDst->getOperand(OpNum);
353 UseIdx = OpNum;
425 for (unsigned OpNum = 0; OpNum < SrcI->getNumOperands(); OpNum++) {
426 const MachineOperand &MO = SrcI->getOperand(OpNum);
428 DefIdx = OpNum;
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/MCParser/
H A DMCParsedAsmOperand.h48 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; } argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/
H A DBitcodeReader.cpp2584 unsigned OpNum = 0; local
2588 PointeeType = getTypeByID(Record[OpNum++]);
2593 uint64_t Op = Record[OpNum++];
2601 while (OpNum != Record.size()) {
2603 Elt0FullTy = getFullyStructuredTypeByID(Record[OpNum]);
2604 Type *ElTy = getTypeByID(Record[OpNum++]);
2607 Elts.push_back(ValueList.getConstantFwdRef(Record[OpNum++], ElTy));
3336 unsigned OpNum = 0; local
3337 Type *FullTy = getFullyStructuredTypeByID(Record[OpNum++]);
3350 AddrSpace = Record[OpNum
3868 unsigned OpNum = 0; local
3889 unsigned OpNum = 0; local
3926 unsigned OpNum = 0; local
3956 unsigned OpNum = 0; local
4001 unsigned OpNum = 0; local
4039 unsigned OpNum = 0; local
4085 unsigned OpNum = 0; local
4100 unsigned OpNum = 0; local
4130 unsigned OpNum = 0; local
4144 unsigned OpNum = 0; local
4160 unsigned OpNum = 0; local
4184 unsigned OpNum = 0; local
4223 unsigned OpNum = 0; local
4473 unsigned OpNum = 0; local
4556 unsigned OpNum = 0; local
4775 unsigned OpNum = 0; local
4803 unsigned OpNum = 0; local
4840 unsigned OpNum = 0; local
4863 unsigned OpNum = 0; local
4897 unsigned OpNum = 0; local
4954 unsigned OpNum = 0; local
4995 unsigned OpNum = 0; local
5112 unsigned OpNum = 1; local
5125 unsigned OpNum = 0; local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp88 /// Given a mask \p DefinedLanes of lanes defined at operand \p OpNum
91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
172 unsigned OpNum = MI.getOperandNo(&MO); local
173 DstSubIdx = MI.getOperand(OpNum+1).getImm();
232 unsigned OpNum = MI.getOperandNo(&MO); local
241 assert(OpNum % 2 == 1);
242 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm();
249 if (OpNum == 2)
261 assert(OpNum == 1);
265 assert(OpNum
295 unsigned OpNum = MI.getOperandNo(&Use); local
310 transferDefinedLanes(const MachineOperand &Def, unsigned OpNum, LaneBitmask DefinedLanes) const argument
404 unsigned OpNum = DefMI.getOperandNo(&MO); local
[all...]
H A DBreakFalseDeps.cpp182 unsigned OpNum; local
183 unsigned Pref = TII->getUndefRegClearance(*MI, OpNum, TRI);
185 bool HadTrueDependency = pickBestRegisterForUndef(MI, OpNum, Pref);
189 if (!HadTrueDependency && shouldBreakDependence(MI, OpNum, Pref))
190 UndefReads.push_back(std::make_pair(MI, OpNum));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMAsmPrinter.h76 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
79 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
81 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFoldTables.h89 // operand OpNum.
90 const X86MemoryFoldTableEntry *lookupFoldTable(unsigned RegOp, unsigned OpNum);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp374 uint64_t OpNum = Op->getOp(); local
376 if (OpNum >= dwarf::DW_OP_reg0 && OpNum <= dwarf::DW_OP_reg31) {
377 emitOp(OpNum);
379 } else if (OpNum >= dwarf::DW_OP_breg0 && OpNum <= dwarf::DW_OP_breg31) {
380 addBReg(OpNum - dwarf::DW_OP_breg0, Op->getArg(0));
384 switch (OpNum) {
434 emitOp(OpNum);
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h212 int getOperandConstraint(unsigned OpNum, argument
214 if (OpNum < NumOperands &&
215 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
217 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp518 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, argument
524 const MachineOperand &MO = MI->getOperand(OpNum);
528 return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
568 if (OpNum == 0)
570 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
586 unsigned RegOp = OpNum;
592 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
595 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum
623 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, const char *ExtraCode, raw_ostream &O) argument
[all...]

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