1//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an AArch64 MCInst to a .s file.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
14#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
15
16#include "MCTargetDesc/AArch64MCTargetDesc.h"
17#include "llvm/ADT/StringRef.h"
18#include "llvm/MC/MCInstPrinter.h"
19#include "../Utils/AArch64BaseInfo.h"
20
21namespace llvm {
22
23class AArch64InstPrinter : public MCInstPrinter {
24public:
25  AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
26                     const MCRegisterInfo &MRI);
27
28  void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29                 const MCSubtargetInfo &STI, raw_ostream &O) override;
30  void printRegName(raw_ostream &OS, unsigned RegNo) const override;
31
32  // Autogenerated by tblgen.
33  virtual void printInstruction(const MCInst *MI, uint64_t Address,
34                                const MCSubtargetInfo &STI, raw_ostream &O);
35  virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
36                               raw_ostream &O);
37  virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
38                                       unsigned PrintMethodIdx,
39                                       const MCSubtargetInfo &STI,
40                                       raw_ostream &O);
41
42  virtual StringRef getRegName(unsigned RegNo) const {
43    return getRegisterName(RegNo);
44  }
45
46  static const char *getRegisterName(unsigned RegNo,
47                                     unsigned AltIdx = AArch64::NoRegAltName);
48
49protected:
50  bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
51                     raw_ostream &O);
52  // Operand printers
53  void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54                    raw_ostream &O);
55  void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
56                raw_ostream &O);
57  void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
58                   raw_ostream &O);
59  template <typename T> void printImmSVE(T Value, raw_ostream &O);
60  void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
61                           raw_ostream &O);
62  template <int Amount>
63  void printPostIncOperand(const MCInst *MI, unsigned OpNo,
64                           const MCSubtargetInfo &STI, raw_ostream &O) {
65    printPostIncOperand(MI, OpNo, Amount, O);
66  }
67
68  void printVRegOperand(const MCInst *MI, unsigned OpNo,
69                        const MCSubtargetInfo &STI, raw_ostream &O);
70  void printSysCROperand(const MCInst *MI, unsigned OpNo,
71                         const MCSubtargetInfo &STI, raw_ostream &O);
72  void printAddSubImm(const MCInst *MI, unsigned OpNum,
73                      const MCSubtargetInfo &STI, raw_ostream &O);
74  template <typename T>
75  void printLogicalImm(const MCInst *MI, unsigned OpNum,
76                       const MCSubtargetInfo &STI, raw_ostream &O);
77  void printShifter(const MCInst *MI, unsigned OpNum,
78                    const MCSubtargetInfo &STI, raw_ostream &O);
79  void printShiftedRegister(const MCInst *MI, unsigned OpNum,
80                            const MCSubtargetInfo &STI, raw_ostream &O);
81  void printExtendedRegister(const MCInst *MI, unsigned OpNum,
82                             const MCSubtargetInfo &STI, raw_ostream &O);
83  void printArithExtend(const MCInst *MI, unsigned OpNum,
84                        const MCSubtargetInfo &STI, raw_ostream &O);
85
86  void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
87                      char SrcRegKind, unsigned Width);
88  template <char SrcRegKind, unsigned Width>
89  void printMemExtend(const MCInst *MI, unsigned OpNum,
90                      const MCSubtargetInfo &STI, raw_ostream &O) {
91    printMemExtend(MI, OpNum, O, SrcRegKind, Width);
92  }
93  template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
94  void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
95                               const MCSubtargetInfo &STI, raw_ostream &O);
96  void printCondCode(const MCInst *MI, unsigned OpNum,
97                     const MCSubtargetInfo &STI, raw_ostream &O);
98  void printInverseCondCode(const MCInst *MI, unsigned OpNum,
99                            const MCSubtargetInfo &STI, raw_ostream &O);
100  void printAlignedLabel(const MCInst *MI, unsigned OpNum,
101                         const MCSubtargetInfo &STI, raw_ostream &O);
102  void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
103                         raw_ostream &O);
104  void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
105                        raw_ostream &O);
106
107  template <int Scale>
108  void printUImm12Offset(const MCInst *MI, unsigned OpNum,
109                         const MCSubtargetInfo &STI, raw_ostream &O) {
110    printUImm12Offset(MI, OpNum, Scale, O);
111  }
112
113  template <int BitWidth>
114  void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
115                        const MCSubtargetInfo &STI, raw_ostream &O) {
116    printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
117  }
118
119  void printAMNoIndex(const MCInst *MI, unsigned OpNum,
120                      const MCSubtargetInfo &STI, raw_ostream &O);
121
122  template <int Scale>
123  void printImmScale(const MCInst *MI, unsigned OpNum,
124                     const MCSubtargetInfo &STI, raw_ostream &O);
125
126  template <bool IsSVEPrefetch = false>
127  void printPrefetchOp(const MCInst *MI, unsigned OpNum,
128                       const MCSubtargetInfo &STI, raw_ostream &O);
129
130  void printPSBHintOp(const MCInst *MI, unsigned OpNum,
131                      const MCSubtargetInfo &STI, raw_ostream &O);
132
133  void printBTIHintOp(const MCInst *MI, unsigned OpNum,
134                      const MCSubtargetInfo &STI, raw_ostream &O);
135
136  void printFPImmOperand(const MCInst *MI, unsigned OpNum,
137                         const MCSubtargetInfo &STI, raw_ostream &O);
138
139  void printVectorList(const MCInst *MI, unsigned OpNum,
140                       const MCSubtargetInfo &STI, raw_ostream &O,
141                       StringRef LayoutSuffix);
142
143  /// Print a list of vector registers where the type suffix is implicit
144  /// (i.e. attached to the instruction rather than the registers).
145  void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
146                                      const MCSubtargetInfo &STI,
147                                      raw_ostream &O);
148
149  template <unsigned NumLanes, char LaneKind>
150  void printTypedVectorList(const MCInst *MI, unsigned OpNum,
151                            const MCSubtargetInfo &STI, raw_ostream &O);
152
153  void printVectorIndex(const MCInst *MI, unsigned OpNum,
154                        const MCSubtargetInfo &STI, raw_ostream &O);
155  void printAdrpLabel(const MCInst *MI, unsigned OpNum,
156                      const MCSubtargetInfo &STI, raw_ostream &O);
157  void printBarrierOption(const MCInst *MI, unsigned OpNum,
158                          const MCSubtargetInfo &STI, raw_ostream &O);
159  void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
160                              const MCSubtargetInfo &STI, raw_ostream &O);
161  void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
162                              const MCSubtargetInfo &STI, raw_ostream &O);
163  void printSystemPStateField(const MCInst *MI, unsigned OpNum,
164                              const MCSubtargetInfo &STI, raw_ostream &O);
165  void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
166                              const MCSubtargetInfo &STI, raw_ostream &O);
167  template<int64_t Angle, int64_t Remainder>
168  void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
169                            const MCSubtargetInfo &STI, raw_ostream &O);
170  template<unsigned size>
171  void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
172                                    const MCSubtargetInfo &STI,
173                                    raw_ostream &O);
174  template <typename T>
175  void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
176                       const MCSubtargetInfo &STI, raw_ostream &O);
177  template <typename T>
178  void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
179                          const MCSubtargetInfo &STI, raw_ostream &O);
180  void printSVEPattern(const MCInst *MI, unsigned OpNum,
181                       const MCSubtargetInfo &STI, raw_ostream &O);
182  template <char = 0>
183  void printSVERegOp(const MCInst *MI, unsigned OpNum,
184                    const MCSubtargetInfo &STI, raw_ostream &O);
185  void printGPR64as32(const MCInst *MI, unsigned OpNum,
186                      const MCSubtargetInfo &STI, raw_ostream &O);
187  template <int Width>
188  void printZPRasFPR(const MCInst *MI, unsigned OpNum,
189                     const MCSubtargetInfo &STI, raw_ostream &O);
190  template <unsigned ImmIs0, unsigned ImmIs1>
191  void printExactFPImm(const MCInst *MI, unsigned OpNum,
192                       const MCSubtargetInfo &STI, raw_ostream &O);
193};
194
195class AArch64AppleInstPrinter : public AArch64InstPrinter {
196public:
197  AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
198                          const MCRegisterInfo &MRI);
199
200  void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
201                 const MCSubtargetInfo &STI, raw_ostream &O) override;
202
203  void printInstruction(const MCInst *MI, uint64_t Address,
204                        const MCSubtargetInfo &STI, raw_ostream &O) override;
205  bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
206                       raw_ostream &O) override;
207  void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
208                               unsigned PrintMethodIdx,
209                               const MCSubtargetInfo &STI,
210                               raw_ostream &O) override;
211
212  StringRef getRegName(unsigned RegNo) const override {
213    return getRegisterName(RegNo);
214  }
215
216  static const char *getRegisterName(unsigned RegNo,
217                                     unsigned AltIdx = AArch64::NoRegAltName);
218};
219
220} // end namespace llvm
221
222#endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
223