Searched refs:MV_BASE (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/sys/arm/mv/
H A Dmvwin.h122 #define MV_BASE MV_PHYS_BASE /* VA == PA mapping */ macro
126 #define MV_DDR_CADR_BASE (MV_BASE + 0xF1500)
128 #define MV_DDR_CADR_BASE (MV_BASE + 0x20180)
130 #define MV_DDR_CADR_BASE (MV_BASE + 0x1500)
132 #define MV_MPP_BASE (MV_BASE + 0x10000)
135 #define MV_MISC_BASE (MV_BASE + 0x18200)
136 #define MV_MBUS_BRIDGE_BASE (MV_BASE + 0x20000)
141 #define MV_MBUS_BRIDGE_BASE (MV_BASE + 0x20000)
145 #define MV_CPU_CONTROL_BASE (MV_BASE + 0x10000)
148 #define MV_PCI_BASE (MV_BASE
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H A Dmvreg.h469 #define MV_SCU_BASE (MV_BASE + 0xc000)
481 #define MV_PMSU_BASE (MV_BASE + 0x22000)
490 #define MV_CPU_RESET_BASE (MV_BASE + 0x20800)
H A Dmv_machdep.c224 if (fdt_immr_addr(MV_BASE) != 0)
/freebsd-11-stable/sys/arm/mv/armadaxp/
H A Darmadaxp_mp.c50 #define MV_AXP_CPU_DIVCLK_BASE (MV_BASE + 0x18700)
56 #define CPU_PMU(x) (MV_BASE + 0x22100 + (0x100 * (x)))
59 #define MP (MV_BASE + 0x20800)
110 pmu_boot_off = (CPU_PMU(0) - MV_BASE) + CPU_PMU_BOOT;
160 bus_space_write_4(fdtbus_bs_tag, MV_BASE, CPU_RESUME_CONTROL, 0);
H A Darmadaxp.c58 #define ARMADAXP_L2_BASE (MV_BASE + 0x8000)
/freebsd-11-stable/sys/arm/mv/orion/
H A Ddb88f5xxx.c82 MV_BASE,

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