Searched refs:MOI (Results 1 - 14 of 14) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMemoryLegalizer.cpp | 410 bool expandLoad(const SIMemOpInfo &MOI, 414 bool expandStore(const SIMemOpInfo &MOI, 418 bool expandAtomicFence(const SIMemOpInfo &MOI, 422 bool expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI, 1135 bool SIMemoryLegalizer::expandLoad(const SIMemOpInfo &MOI, argument 1141 if (MOI.isAtomic()) { 1142 if (MOI.getOrdering() == AtomicOrdering::Monotonic || 1143 MOI.getOrdering() == AtomicOrdering::Acquire || 1144 MOI.getOrdering() == AtomicOrdering::SequentiallyConsistent) { 1145 Changed |= CC->enableLoadCacheBypass(MI, MOI 1180 expandStore(const SIMemOpInfo &MOI, MachineBasicBlock::iterator &MI) argument 1207 expandAtomicFence(const SIMemOpInfo &MOI, MachineBasicBlock::iterator &MI) argument 1245 expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI, MachineBasicBlock::iterator &MI) argument [all...] |
H A D | R600EmitClauseMarkers.cpp | 201 MOI = Def->operands_begin(), 202 MOE = Def->operands_end(); MOI != MOE; ++MOI) { 203 if (!MOI->isReg() || !MOI->isDef() || 204 TRI.isPhysRegLiveAcrossClauses(MOI->getReg())) 228 if (UseI->readsRegister(MOI->getReg(), &TRI)) 232 if (UseI != Def && UseI->killsRegister(MOI->getReg(), &TRI))
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | StackMaps.cpp | 102 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI, argument 106 if (MOI->isImm()) { 107 switch (MOI->getImm()) { 116 Register Reg = (++MOI)->getReg(); 117 int64_t Imm = (++MOI)->getImm(); 123 int64_t Size = (++MOI)->getImm(); 125 Register Reg = (++MOI)->getReg(); 126 int64_t Imm = (++MOI)->getImm(); 132 ++MOI; 133 assert(MOI 297 recordStackMapOpers(const MCSymbol &MILabel, const MachineInstr &MI, uint64_t ID, MachineInstr::const_mop_iterator MOI, MachineInstr::const_mop_iterator MOE, bool recordResult) argument 377 auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx()); local [all...] |
H A D | LiveRangeEdit.cpp | 307 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), 308 MOE = MI->operands_end(); MOI != MOE; ++MOI) { 309 if (!MOI->isReg()) 311 Register Reg = MOI->getReg(); 314 if (Reg && MOI->readsReg() && !MRI.isReserved(Reg)) 316 else if (MOI->isDef()) 326 if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) || 327 (MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI)))) [all...] |
H A D | VirtRegMap.cpp | 507 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), 508 MOE = MI->operands_end(); MOI != MOE; ++MOI) { 509 MachineOperand &MO = *MOI;
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H A D | LiveInterval.cpp | 904 for (ConstMIBundleOperands MOI(*MI); MOI.isValid(); ++MOI) { 905 if (!MOI->isReg() || !MOI->isDef()) 907 if (MOI->getReg() != Reg) 909 LaneBitmask OrigMask = TRI.getSubRegIndexLaneMask(MOI->getSubReg());
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H A D | MachineVerifier.cpp | 2436 for (ConstMIBundleOperands MOI(*MI); MOI.isValid(); ++MOI) { 2437 if (!MOI->isReg() || !MOI->isDef()) 2440 if (MOI->getReg() != Reg) 2443 if (!Register::isPhysicalRegister(MOI->getReg()) || 2444 !TRI->hasRegUnit(MOI->getReg(), Reg)) 2448 (TRI->getSubRegIndexLaneMask(MOI->getSubReg()) & LaneMask).none()) 2451 if (MOI [all...] |
H A D | MachineTraceMetrics.cpp | 900 for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(), 902 MOI != MOE; ++MOI) { 903 const MachineOperand &MO = *MOI; 910 ReadOps.push_back(MI.getOperandNo(MOI)); 923 DepHeight += SchedModel.computeOperandLatency(&MI, MI.getOperandNo(MOI),
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H A D | LiveIntervals.cpp | 1611 for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(), 1613 MOI != MOE; ++MOI) { 1614 if (MOI->isReg() && Register::isVirtualRegister(MOI->getReg()) && 1615 !hasInterval(MOI->getReg())) { 1616 createAndComputeVirtRegInterval(MOI->getReg());
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H A D | ModuloSchedule.cpp | 725 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), 727 MOI != MOE; ++MOI) { 728 if (!MOI->isReg() || !MOI->isDef()) 730 Register reg = MOI->getReg(); 733 used = !MOI->isDead();
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H A D | MachinePipeliner.cpp | 767 for (MachineInstr::mop_iterator MOI = MI->operands_begin(), 769 MOI != MOE; ++MOI) { 770 if (!MOI->isReg()) 772 Register Reg = MOI->getReg(); 773 if (MOI->isDef()) { 795 } else if (MOI->isUse()) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
H A D | AVRInstPrinter.cpp | 104 const MCOperandInfo &MOI = this->MII.get(MI->getOpcode()).OpInfo[OpNo]; local 107 bool isPtrReg = (MOI.RegClass == AVR::PTRREGSRegClassID) || 108 (MOI.RegClass == AVR::PTRDISPREGSRegClassID) || 109 (MOI.RegClass == AVR::ZREGRegClassID);
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | StackMaps.h | 300 parseOperand(MachineInstr::const_mop_iterator MOI, 321 MachineInstr::const_mop_iterator MOI,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonEarlyIfConv.cpp | 724 MachineInstr::mop_iterator MOI = MI->operands_begin(); local 726 MIB.add(*MOI); 727 ++MOI; 730 for (const MachineOperand &MO : make_range(MOI, MI->operands_end()))
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