Searched refs:INLINEASM (Results 1 - 25 of 35) sorted by relevance
12
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ResourcePriorityQueue.cpp | 86 case ISD::INLINEASM: break; 123 case ISD::INLINEASM: break; 449 case ISD::INLINEASM: 552 case ISD::INLINEASM:
|
H A D | InstrEmitter.cpp | 1045 case ISD::INLINEASM: 1054 : TargetOpcode::INLINEASM;
|
H A D | SelectionDAGDumper.cpp | 174 case ISD::INLINEASM: return "inlineasm";
|
H A D | ScheduleDAGFast.cpp | 482 if (Node->getOpcode() == ISD::INLINEASM ||
|
H A D | ScheduleDAGRRList.cpp | 716 case ISD::INLINEASM: 1362 if (Node->getOpcode() == ISD::INLINEASM ||
|
H A D | SelectionDAGISel.cpp | 2244 SDValue New = CurDAG->getNode(Branch ? ISD::INLINEASM_BR : ISD::INLINEASM, DL, VTs, Ops); 2810 case ISD::INLINEASM:
|
H A D | FastISel.cpp | 1328 TII.get(TargetOpcode::INLINEASM))
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonVectorPrint.cpp | 102 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM))
|
H A D | HexagonMachineScheduler.cpp | 114 case TargetOpcode::INLINEASM: 170 case TargetOpcode::INLINEASM:
|
H A D | HexagonInstrInfo.cpp | 2339 case TargetOpcode::INLINEASM: 2793 case Hexagon::INLINEASM: 4306 if (BranchRelaxAsmLarge && MI.getOpcode() == Hexagon::INLINEASM) {
|
H A D | HexagonISelLowering.cpp | 635 if ((Op.getOpcode() != ISD::INLINEASM && 1353 setOperationAction(ISD::INLINEASM, MVT::Other, Custom); 2885 // Handle INLINEASM first. 2886 if (Opc == ISD::INLINEASM || Opc == ISD::INLINEASM_BR)
|
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 710 /// INLINEASM - Represents an inline asm block. This node always has two 725 INLINEASM, enumerator in enum:llvm::ISD::NodeType
|
H A D | MachineInstr.h | 1086 return getOpcode() == TargetOpcode::INLINEASM || 1477 /// INLINEASM instruction, in which case the side effect property is encoded
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSERegisterInfo.cpp | 103 case Mips::INLINEASM: {
|
H A D | MipsInstrInfo.cpp | 580 case TargetOpcode::INLINEASM:
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 310 case TargetOpcode::INLINEASM:
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 331 case ISD::INLINEASM:
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyAsmPrinter.cpp | 393 assert(MI->getOpcode() == WebAssembly::INLINEASM);
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRInstrInfo.cpp | 490 case TargetOpcode::INLINEASM:
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.cpp | 487 if (Opcode == ARM::INLINEASM || Opcode == ARM::INLINEASM_BR)
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeAnalyzer.cpp | 213 STRINGIFY_CODE(CST_CODE, INLINEASM)
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 424 case PPC::INLINEASM:
|
H A D | PPCRegisterInfo.cpp | 1148 else if (OpC != TargetOpcode::INLINEASM &&
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfo.cpp | 482 case TargetOpcode::INLINEASM:
|
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 1491 case TargetOpcode::INLINEASM:
|
Completed in 394 milliseconds
12