Searched refs:HRI (Results 1 - 18 of 18) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp283 const HexagonRegisterInfo &HRI) {
311 for (MCSubRegIterator S(R, &HRI, true); S.isValid(); ++S)
404 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
436 for (const MCPhysReg *P = HRI.getCalleeSavedRegs(&MF); *P; ++P)
437 for (MCSubRegIterator S(*P, &HRI, true); S.isValid(); ++S)
441 if (needsStackFrame(I, CSR, HRI))
505 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
515 insertCSRSpillsInBlock(*PrologB, CSI, HRI, PrologueStubs);
520 insertCSRRestoresInBlock(*EpilogB, CSI, HRI);
525 insertCSRRestoresInBlock(B, CSI, HRI);
282 needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR, const HexagonRegisterInfo &HRI) argument
589 auto &HRI = *HST.getRegisterInfo(); local
650 auto &HRI = *HST.getRegisterInfo(); local
738 auto &HRI = *HST.getRegisterInfo(); local
886 auto &HRI = *HST.getRegisterInfo(); local
997 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1113 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1210 insertCSRSpillsInBlock(MachineBasicBlock &MBB, const CSIVect &CSI, const HexagonRegisterInfo &HRI, bool &PrologueStubs) const argument
1429 needToReserveScavengingSpillSlots(MachineFunction &MF, const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC) argument
1714 auto *HRI = B.getParent()->getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1745 auto *HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1764 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1829 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1880 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1911 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
1978 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
2035 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
2066 auto &HRI = *HST.getRegisterInfo(); local
[all...]
H A DHexagonVExtract.cpp104 const auto &HRI = *HST->getRegisterInfo(); local
140 unsigned Align = HRI.getSpillAlignment(VecRC);
146 int FI = MFI.CreateStackObject(HRI.getSpillSize(VecRC), Align,
161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8;
H A DHexagonGenMux.cpp89 const HexagonRegisterInfo *HRI = nullptr; member in class:__anon2248::HexagonGenMux
147 for (MCSubRegIterator I(Reg, HRI); I.isValid(); ++I)
183 unsigned NR = HRI->getNumRegs();
355 LivePhysRegs LPR(*HRI);
358 for (MCSubRegIterator S(Reg, HRI, true); S.isValid(); ++S)
387 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
H A DHexagonInstrInfo.cpp126 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { argument
127 return isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_lo)) &&
128 isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::isub_hi));
791 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
852 Register LoSrc = HRI.getSubReg(SrcReg, Hexagon::vsub_lo);
853 Register HiSrc = HRI.getSubReg(SrcReg, Hexagon::vsub_hi);
879 << printReg(DestReg, &HRI) << " = " << printReg(SrcReg, &HRI) << '\n';
987 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
1028 .addReg(HRI
1621 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
2092 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
3727 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
4099 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
4212 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
[all...]
H A DHexagonBranchRelaxation.cpp69 const HexagonRegisterInfo *HRI; member in struct:__anon2222::HexagonBranchRelaxation
96 HRI = HST.getRegisterInfo();
H A DHexagonVLIWPacketizer.cpp116 const HexagonRegisterInfo *HRI = nullptr; member in class:__anon2271::HexagonPacketizer
139 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
208 HRI = HST.getRegisterInfo();
299 if (DepReg == HRI->getRARegister())
303 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister())
484 if (HII->isValidOffset(Opc, NewOff, HRI)) {
535 if (!HII->isValidOffset(MI.getOpcode(), Offset+Incr, HRI))
658 const TargetRegisterClass *PacketRC = HII->getRegClass(MCID, 0, HRI, MF);
708 predRegClass = HRI
[all...]
H A DHexagonISelDAGToDAG.h33 const HexagonRegisterInfo *HRI; member in class:llvm::HexagonDAGToDAGISel
38 HRI(nullptr) {}
44 HRI = HST->getRegisterInfo();
H A DHexagonBitSimplify.cpp438 auto &HRI = static_cast<const HexagonRegisterInfo&>(
440 unsigned SubLo = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_lo);
441 unsigned SubHi = HRI.getHexagonSubRegIndex(DstRC, Hexagon::ps_sub_hi);
902 auto &HRI = static_cast<const HexagonRegisterInfo&>(
905 auto VerifySR = [&HRI] (const TargetRegisterClass *RC, unsigned Sub) -> void {
906 (void)HRI;
907 assert(Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_lo) ||
908 Sub == HRI.getHexagonSubRegIndex(*RC, Hexagon::ps_sub_hi));
1054 : Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {}
1069 const HexagonRegisterInfo &HRI;
[all...]
H A DHexagonConstExtenders.cpp383 const HexagonRegisterInfo *HRI = nullptr; member in struct:__anon2229::HexagonConstExtenders
445 : Rs(R), HRI(I) {}
447 const HexagonRegisterInfo &HRI; member in struct:__anon2229::PrintRegister
453 OS << printReg(P.Rs.Reg, &P.HRI, P.Rs.Sub);
461 : Ex(E), HRI(I) {}
463 const HexagonRegisterInfo &HRI; member in struct:__anon2229::PrintExpr
470 OS << printReg(P.Ex.Rs.Reg, &P.HRI, P.Ex.Rs.Sub);
479 : ExtI(EI), HRI(I) {}
481 const HexagonRegisterInfo &HRI; member in struct:__anon2229::PrintInit
487 << PrintExpr(P.ExtI.second, P.HRI) << ']';
496 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
552 const HexagonRegisterInfo &HRI; member in struct:__anon2229::PrintIMap
[all...]
H A DHexagonFrameLowering.h117 const HexagonRegisterInfo &HRI, bool &PrologueStubs) const;
119 const HexagonRegisterInfo &HRI) const;
H A DHexagonGenInsert.cpp569 const HexagonRegisterInfo *HRI = nullptr;
589 dbgs() << " " << printReg(I->first, HRI) << ":\n";
592 dbgs() << " " << PrintIFR(LL[i].first, HRI) << ", "
593 << PrintRegSet(LL[i].second, HRI) << '\n';
802 dbgs() << __func__ << ": " << printReg(VR, HRI)
803 << " AVs: " << PrintORL(AVs, HRI) << "\n";
867 dbgs() << "Prefixes matching register " << printReg(VR, HRI) << "\n";
872 dbgs() << " (" << printReg(LL[i].first, HRI) << ",@"
919 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI)
[all...]
H A DHexagonVLIWPacketizer.h67 const HexagonRegisterInfo *HRI; member in class:llvm::HexagonPacketizerList
H A DHexagonRDFOpt.cpp295 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
303 DataFlowGraph G(MF, HII, HRI, *MDT, MDF, TOI);
H A DHexagonOptAddrMode.cpp84 const HexagonRegisterInfo *HRI = nullptr; member in class:__anon97::HexagonOptAddrMode
345 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false);
786 HRI = HST.getRegisterInfo();
791 DataFlowGraph G(MF, *HII, *HRI, *MDT, MDF, TOI);
H A DHexagonISelLowering.cpp427 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
429 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT);
493 unsigned VecAlign = HRI.getSpillAlignment(Hexagon::HvxVRRegClass);
564 const uint32_t *Mask = HRI.getCallPreservedMask(MF, CallConv);
632 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
633 unsigned LR = HRI.getRARegister();
1021 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
1041 unsigned Reg = MF.addLiveIn(HRI.getRARegister(), getRegClassFor(MVT::i32));
1047 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); local
1055 HRI
1147 const auto &HRI = *Subtarget.getRegisterInfo(); local
1290 auto &HRI = *Subtarget.getRegisterInfo(); local
[all...]
H A DHexagonBitTracker.cpp95 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); local
96 bool IsSubLo = (Sub == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo));
138 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); local
139 bool IsSubLo = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_lo));
140 bool IsSubHi = (Idx == HRI.getHexagonSubRegIndex(RC, Hexagon::ps_sub_hi));
H A DHexagonAsmPrinter.cpp270 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); local
271 unsigned VectorSize = HRI.getRegSizeInBits(Hexagon::HvxVRRegClass) / 8;
H A DHexagonConstPropagation.cpp1889 const HexagonRegisterInfo &HRI; member in class:__anon2236::HexagonConstEvaluator
1922 HRI(*Fn.getSubtarget<HexagonSubtarget>().getRegisterInfo()) {
1955 unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo);
1956 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi);
2811 dbgs() << "Top " << printReg(R.Reg, &HRI, R.SubReg)

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