Searched refs:FP_TO_UINT (Results 1 - 25 of 28) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp268 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
270 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 },
272 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
286 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 },
288 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 },
290 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 }
303 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 },
305 { ISD::FP_TO_UINT, MVT::i1, MVT::f64, 2 },
307 { ISD::FP_TO_UINT, MVT::i8, MVT::f32, 2 },
309 { ISD::FP_TO_UINT, MV
[all...]
H A DARMISelLowering.cpp175 setOperationAction(ISD::FP_TO_UINT, VT, Custom);
180 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
300 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
868 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom);
869 setOperationAction(ISD::FP_TO_UINT, MVT::v8i16, Custom);
923 setTargetDAGCombine(ISD::FP_TO_UINT);
980 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
982 setOperationAction(ISD::FP_TO_UINT, MVT::f64, Custom);
5428 : ISD::FP_TO_UINT,
9311 case ISD::FP_TO_UINT
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp370 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 },
371 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
372 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 },
378 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 2 },
379 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 },
380 { ISD::FP_TO_UINT, MVT::v2i8, MVT::v2f32, 1 },
385 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
386 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 },
392 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 },
393 { ISD::FP_TO_UINT, MV
[all...]
H A DAArch64ISelLowering.cpp290 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
291 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
292 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom);
639 setTargetDAGCombine(ISD::FP_TO_UINT);
732 setOperationAction(ISD::FP_TO_UINT, MVT::v1i64, Expand);
921 setOperationAction(ISD::FP_TO_UINT, VT, Custom);
3254 case ISD::FP_TO_UINT:
12563 case ISD::FP_TO_UINT:
12958 case ISD::FP_TO_UINT:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp1324 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f32, 1 },
1325 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f32, 1 },
1326 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 },
1327 { ISD::FP_TO_UINT, MVT::v2i64, MVT::v2f64, 1 },
1328 { ISD::FP_TO_UINT, MVT::v4i64, MVT::v4f64, 1 },
1329 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 },
1395 { ISD::FP_TO_UINT, MVT::i64, MVT::f32, 1 },
1396 { ISD::FP_TO_UINT, MVT::i64, MVT::f64, 1 },
1398 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 },
1399 { ISD::FP_TO_UINT, MV
[all...]
H A DX86ISelLowering.cpp261 // Handle FP_TO_UINT by promoting the destination to a larger signed
263 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote);
266 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
269 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
271 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
801 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
974 setOperationAction(ISD::FP_TO_UINT, VT, Custom);
1181 setOperationPromotedToType(ISD::FP_TO_UINT, MVT::v8i16, MVT::v8i32);
1383 setOperationPromotedToType(ISD::FP_TO_UINT, MVT::v8i1, MVT::v8i32);
1385 setOperationPromotedToType(ISD::FP_TO_UINT, MV
[all...]
H A DX86ISelDAGToDAG.cpp822 case ISD::FP_TO_UINT:
838 case ISD::FP_TO_UINT: NewOpc = X86ISD::CVTTP2UI; break;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h586 FP_TO_UINT, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp99 /// Implements expansion for FP_TO_UINT; falls back to UnrollVectorOp if
409 case ISD::FP_TO_UINT:
566 case ISD::FP_TO_UINT:
669 // Change FP_TO_UINT to FP_TO_SINT if possible.
670 // TODO: Should we only do this if FP_TO_UINT itself isn't legal?
671 if (NewOpc == ISD::FP_TO_UINT &&
691 if (Node->getOpcode() == ISD::FP_TO_UINT ||
869 case ISD::FP_TO_UINT:
H A DSelectionDAGDumper.cpp339 case ISD::FP_TO_UINT: return "fp_to_uint";
H A DLegalizeVectorTypes.cpp93 case ISD::FP_TO_UINT:
572 case ISD::FP_TO_UINT:
887 case ISD::FP_TO_UINT:
1962 case ISD::FP_TO_UINT:
2795 case ISD::FP_TO_UINT:
4215 case ISD::FP_TO_UINT:
H A DLegalizeFloatTypes.cpp783 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
1665 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1809 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1973 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
H A DLegalizeIntegerTypes.cpp122 case ISD::FP_TO_UINT: Res = PromoteIntRes_FP_TO_XINT(N); break;
525 // If we're promoting a UINT to a larger size and the larger FP_TO_UINT is
529 if (N->getOpcode() == ISD::FP_TO_UINT &&
530 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
556 return DAG.getNode((N->getOpcode() == ISD::FP_TO_UINT ||
1830 case ISD::FP_TO_UINT: ExpandIntRes_FP_TO_UINT(N, Lo, Hi); break;
H A DLegalizeDAG.cpp2550 /// legal for the target, and that there is a legal FP_TO_UINT or FP_TO_SINT
2576 OpToUse = IsStrict ? ISD::STRICT_FP_TO_UINT : ISD::FP_TO_UINT;
2986 case ISD::FP_TO_UINT:
4279 case ISD::FP_TO_UINT:
H A DSelectionDAG.cpp4487 case ISD::FP_TO_UINT: {
4489 APSInt IntVal(VT.getSizeInBits(), Opcode == ISD::FP_TO_UINT);
4531 case ISD::FP_TO_UINT:
4582 case ISD::FP_TO_UINT:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp343 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
365 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
1152 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG);
1550 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT;
1694 SDValue Rcp_Lo = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Mad2);
1695 SDValue Rcp_Hi = DAG.getNode(ISD::FP_TO_UINT, DL, HalfVT, Trunc);
2601 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL,
2603 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma);
H A DR600ISelLowering.cpp166 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom);
169 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
659 case ISD::FP_TO_UINT:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp251 setOperationAction(ISD::FP_TO_UINT, MVT::ppcf128, Custom);
531 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand);
536 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
541 // PowerPC does not have FP_TO_UINT on 32-bit implementations.
543 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal);
545 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
552 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
558 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
728 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal);
884 setOperationAction(ISD::FP_TO_UINT, MV
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1515 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
1517 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom);
3023 case ISD::FP_TO_UINT: return LowerFP_TO_UINT(Op, DAG, *this,
3347 case ISD::FP_TO_UINT:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1591 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote);
1592 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote);
1593 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp202 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
890 case ISD::FP_TO_UINT: {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp215 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
401 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal);
402 setOperationAction(ISD::FP_TO_UINT, MVT::v2f64, Legal);
421 setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal);
422 setOperationAction(ISD::FP_TO_UINT, MVT::v4f32, Legal);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1623 case FPToUI: return ISD::FP_TO_UINT;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp357 setOperationAction(ISD::FP_TO_UINT, Ty, Legal);
1929 return DAG.getNode(ISD::FP_TO_UINT, DL, Op->getValueType(0),
H A DMipsISelLowering.cpp411 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand);
412 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Expand);

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