Searched refs:FP_EXTEND (Results 1 - 25 of 31) sorted by relevance

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/freebsd-11-stable/contrib/gcc/config/soft-fp/
H A Dextenddftf2.c46 FP_EXTEND(Q,D,4,2,R,A);
48 FP_EXTEND(Q,D,2,1,R,A);
H A Dextendsfdf2.c46 FP_EXTEND(D,S,2,1,R,A);
48 FP_EXTEND(D,S,1,1,R,A);
H A Dextendsftf2.c46 FP_EXTEND(Q,S,4,1,R,A);
48 FP_EXTEND(Q,S,2,1,R,A);
H A Dop-common.h1151 #define FP_EXTEND(dfs,sfs,dwc,swc,D,S) \ macro
/freebsd-11-stable/contrib/gcc/config/rs6000/
H A Ddarwin-ldouble.c393 FP_EXTEND(Q,D,4,2,X,A);
394 FP_EXTEND(Q,D,4,2,Y,B);
395 FP_EXTEND(Q,D,4,2,Z,C);
397 FP_EXTEND(Q,D,2,1,X,A);
398 FP_EXTEND(Q,D,2,1,Y,B);
399 FP_EXTEND(Q,D,2,1,Z,C);
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h597 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
598 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
609 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
610 FP_EXTEND, enumerator in enum:llvm::ISD::NodeType
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp102 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
473 // If the promotion did the FP_EXTEND to the destination type for us,
481 // hard-float FP_EXTEND rather than FP16_TO_FP.
488 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
493 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
505 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
520 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
669 // Do a non-extending load followed by FP_EXTEND.
677 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
1164 case ISD::FP_EXTEND
[all...]
H A DDAGCombiner.cpp1591 case ISD::FP_EXTEND: return visitFP_EXTEND(N);
9434 CastOpcode == ISD::TRUNCATE || CastOpcode == ISD::FP_EXTEND ||
11583 // Look through FP_EXTEND nodes to do more combining.
11586 if (N0.getOpcode() == ISD::FP_EXTEND) {
11592 DAG.getNode(ISD::FP_EXTEND, SL, VT,
11594 DAG.getNode(ISD::FP_EXTEND, SL, VT,
11601 if (N1.getOpcode() == ISD::FP_EXTEND) {
11607 DAG.getNode(ISD::FP_EXTEND, SL, VT,
11609 DAG.getNode(ISD::FP_EXTEND, SL, VT,
11650 DAG.getNode(ISD::FP_EXTEND, S
[all...]
H A DLegalizeDAG.cpp2907 // We might as well mutate to FP_EXTEND when FP_EXTEND operation is legal
2913 // We fall back to use stack operation when the FP_EXTEND operation
2921 case ISD::FP_EXTEND:
3219 DAG.getNode(ISD::FP_EXTEND, dl, Node->getValueType(0), Res));
4388 ExtOp = ISD::FP_EXTEND;
4420 unsigned ExtOp = ISD::FP_EXTEND;
4433 unsigned ExtOp = ISD::FP_EXTEND;
4454 Tmp1 = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(0));
4455 Tmp2 = DAG.getNode(ISD::FP_EXTEND, d
[all...]
H A DLegalizeVectorOps.cpp436 case ISD::FP_EXTEND:
574 case ISD::FP_EXTEND:
599 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Node->getOperand(j));
H A DSelectionDAGDumper.cpp330 case ISD::FP_EXTEND: return "fp_extend";
H A DLegalizeVectorTypes.cpp91 case ISD::FP_EXTEND:
695 ? DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Res)
884 case ISD::FP_EXTEND:
1969 case ISD::FP_EXTEND:
2792 case ISD::FP_EXTEND:
4209 case ISD::FP_EXTEND:
H A DTargetLowering.cpp5494 bool IsFreeExtend = Op.getOpcode() == ISD::FP_EXTEND &&
5599 case ISD::FP_EXTEND:
5716 case ISD::FP_EXTEND:
6703 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND :
H A DSelectionDAG.cpp337 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
1124 ? getNode(ISD::FP_EXTEND, DL, VT, Op)
4126 case ISD::FP_EXTEND:
4478 case ISD::FP_EXTEND: {
4529 case ISD::FP_EXTEND:
4568 case ISD::FP_EXTEND:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp162 { ISD::FP_EXTEND, MVT::v2f32, 2 },
163 { ISD::FP_EXTEND, MVT::v4f32, 4 }
167 ISD == ISD::FP_EXTEND)) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp280 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom);
502 setOperationAction(ISD::FP_EXTEND, MVT::v8f16, Expand);
729 setOperationAction(ISD::FP_EXTEND, MVT::v1f64, Expand);
1715 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS);
1716 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS);
1816 LHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, LHS);
1817 RHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, RHS);
2566 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0)));
2582 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0));
2604 DAG.getNode(ISD::FP_EXTEND, d
[all...]
H A DAArch64ISelDAGToDAG.cpp1835 assert(N->getOpcode() == ISD::FP_EXTEND);
3093 case ISD::FP_EXTEND:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp934 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal);
966 setOperationAction(ISD::FP_EXTEND, MVT::v2f32, Custom);
1018 setOperationAction(ISD::FP_EXTEND, MVT::v4f64, Legal);
7634 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7637 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1);
7647 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7656 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7670 Cmp = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Cmp);
7673 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1);
7680 Cmp = DAG.getNode(ISD::FP_EXTEND, d
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp286 setOperationAction(ISD::FP_EXTEND, MVT::v4f32, Expand);
585 setOperationAction(ISD::FP_EXTEND, MVT::v2f32, Expand);
2812 Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg);
4256 Src0 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src0);
4257 Src1 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src1);
4585 DAG.getNode(ISD::FP_EXTEND, DL, VT, Op) :
7644 SDValue CvtSrc0 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src0);
7645 SDValue CvtSrc1 = DAG.getNode(ISD::FP_EXTEND, SL, MVT::f32, Src1);
8772 case ISD::FP_EXTEND:
9760 Op1.getOpcode() != ISD::FP_EXTEND ||
[all...]
H A DAMDGPUISelLowering.cpp2719 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src);
2742 SDValue FPExtend = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, Src);
3805 case ISD::FP_EXTEND:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp1336 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 },
1337 { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 },
1435 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 3 },
1516 { ISD::FP_EXTEND, MVT::v4f64, MVT::v4f32, 1 },
H A DX86IntrinsicsInfo.h507 ISD::FP_EXTEND, X86ISD::VFPEXT_SAE),
H A DX86ISelDAGToDAG.cpp1035 case ISD::FP_EXTEND:
1055 if (N->getOpcode() == ISD::FP_EXTEND)
1076 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the
1160 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1716 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal);
1744 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom);
3050 case ISD::FP_EXTEND: return LowerF128_FPEXTEND(Op, DAG, *this);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1628 case FPExt: return ISD::FP_EXTEND;

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