Searched refs:FP16_TO_FP (Results 1 - 15 of 15) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 631 /// FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions 635 FP16_TO_FP, FP_TO_FP16, enumerator in enum:llvm::ISD::NodeType
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 343 case ISD::FP16_TO_FP: return "fp16_to_fp";
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H A D | LegalizeFloatTypes.cpp | 105 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break; 481 // hard-float FP_EXTEND rather than FP16_TO_FP. 1939 return ISD::FP16_TO_FP; 2090 case ISD::FP16_TO_FP:
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H A D | LegalizeDAG.cpp | 909 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); 3211 case ISD::FP16_TO_FP: 3217 DAG.getNode(ISD::FP16_TO_FP, dl, MVT::f32, Node->getOperand(0)); 4130 case ISD::FP16_TO_FP:
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H A D | DAGCombiner.cpp | 1619 case ISD::FP16_TO_FP: return visitFP16_TO_FP(N); 13294 if (N0.getOpcode() == ISD::FP16_TO_FP && 13295 TLI.getOperationAction(ISD::FP16_TO_FP, VT) == TargetLowering::Legal) 13296 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), VT, N0.getOperand(0)); 19721 if (N0->getOpcode() == ISD::FP16_TO_FP) 19734 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), N->getValueType(0),
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H A D | LegalizeIntegerTypes.cpp | 1296 case ISD::FP16_TO_FP:
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H A D | SelectionDAG.cpp | 4436 case ISD::FP16_TO_FP: {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 301 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); 3846 case ISD::FP16_TO_FP: { 3858 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFNeg); 3874 case ISD::FP16_TO_FP: { 3883 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFAbs);
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H A D | SIISelLowering.cpp | 483 setOperationAction(ISD::FP16_TO_FP, MVT::i16, Promote); 484 AddPromotedToType(ISD::FP16_TO_FP, MVT::i16, MVT::i32);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 105 setOperationAction(ISD::FP16_TO_FP, T, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 452 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); 454 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 164 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 178 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); 181 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1349 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); 1355 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 366 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); 371 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); 372 setOperationAction(ISD::FP16_TO_FP, MVT::f80, Expand); 373 setOperationAction(ISD::FP16_TO_FP, MVT::f128, Expand); [all...] |
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