Searched refs:FMINIMUM (Results 1 - 19 of 19) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 660 /// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
662 /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
663 FMINIMUM, FMAXIMUM, enumerator in enum:llvm::ISD::NodeType
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| H A D | BasicTTIImpl.h | 1252 ISDs.push_back(ISD::FMINIMUM);
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| H A D | TargetLowering.h | 2263 case ISD::FMINIMUM:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 188 case ISD::FMINIMUM: return "fminimum";
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| H A D | LegalizeVectorTypes.cpp | 118 case ISD::FMINIMUM:
916 case ISD::FMINIMUM:
2085 CombineOpc = NoNaN ? ISD::FMINNUM : ISD::FMINIMUM;
2721 case ISD::FMINIMUM:
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| H A D | LegalizeVectorOps.cpp | 416 case ISD::FMINIMUM:
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| H A D | SelectionDAGBuilder.cpp | 3333 case SPNB_RETURNS_NAN: Opc = ISD::FMINIMUM; break;
3338 else if (TLI.isOperationLegalOrCustom(ISD::FMINIMUM, VT))
3339 Opc = ISD::FMINIMUM;
3342 ISD::FMINNUM : ISD::FMINIMUM;
6232 setValue(&I, DAG.getNode(ISD::FMINIMUM, sdl,
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| H A D | LegalizeFloatTypes.cpp | 2129 case ISD::FMINIMUM:
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| H A D | TargetLowering.cpp | 6341 // If the target has FMINIMUM/FMAXIMUM but not FMINNUM/FMAXNUM use that
6345 Node->getOpcode() == ISD::FMINNUM ? ISD::FMINIMUM : ISD::FMAXIMUM;
7630 BaseOpcode = NoNaN ? ISD::FMINNUM : ISD::FMINIMUM;
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| H A D | SelectionDAG.cpp | 4172 case ISD::FMINIMUM:
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| H A D | DAGCombiner.cpp | 1597 case ISD::FMINIMUM: return visitFMINIMUM(N);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 547 setOperationAction(ISD::FMINIMUM, MVT::f64, Legal);
552 setOperationAction(ISD::FMINIMUM, MVT::v2f64, Legal);
557 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal);
562 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal);
567 setOperationAction(ISD::FMINIMUM, MVT::f128, Legal);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 643 setOperationAction(ISD::FMINIMUM, VT, Expand);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 102 setOperationAction(ISD::FMINIMUM, T, Legal);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 454 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
515 setOperationAction(ISD::FMINIMUM, Ty, Legal);
532 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal);
935 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM})
11019 return DAG.getNode(ISD::FMINIMUM, SDLoc(N), N->getValueType(0),
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1425 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal);
1427 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal);
1429 setOperationAction(ISD::FMINIMUM, MVT::v2f32, Legal);
1431 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal);
1440 setOperationAction(ISD::FMINIMUM, MVT::v4f16, Legal);
1442 setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal);
3772 ? ISD::FMINIMUM : ISD::FMAXIMUM;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 161 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 581 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | [all...] |
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