Searched refs:FCOS (Results 1 - 25 of 27) sorted by relevance

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/freebsd-11-stable/contrib/one-true-awk/
H A Dawk.h124 #define FCOS 10 macro
H A Dlex.c54 { "cos", FCOS, BLTIN },
H A Drun.c1506 case FCOS:
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h640 FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW, enumerator in enum:llvm::ISD::NodeType
H A DBasicTTIImpl.h1226 ISDs.push_back(ISD::FCOS);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp198 case ISD::FCOS: return "fcos";
H A DLegalizeFloatTypes.cpp79 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
1141 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
2109 case ISD::FCOS:
H A DLegalizeDAG.cpp2260 ? ISD::FCOS : ISD::FSIN;
3193 case ISD::FCOS: {
3202 if (Node->getOpcode() == ISD::FCOS)
3966 case ISD::FCOS:
4510 case ISD::FCOS:
H A DLegalizeVectorTypes.cpp82 case ISD::FCOS:
875 case ISD::FCOS:
2806 case ISD::FCOS:
H A DLegalizeVectorOps.cpp421 case ISD::FCOS:
H A DSelectionDAGBuilder.cpp6186 case Intrinsic::cos: Opcode = ISD::FCOS; break;
7666 if (visitUnaryFloatCall(I, ISD::FCOS))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp144 setOperationAction(ISD::FCOS, MVT::f32, Custom);
487 case ISD::FCOS:
772 case ISD::FCOS:
H A DSIISelLowering.cpp442 setOperationAction(ISD::FCOS, MVT::f32, Custom);
502 setOperationAction(ISD::FCOS, MVT::f16, Promote);
4049 case ISD::FCOS:
7991 case ISD::FCOS:
8608 case ISD::FCOS:
8802 case ISD::FCOS:
H A DAMDGPUISelLowering.cpp408 setOperationAction(ISD::FCOS, VT, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1617 setOperationAction(ISD::FCOS , MVT::f128, Expand);
1622 setOperationAction(ISD::FCOS , MVT::f64, Expand);
1627 setOperationAction(ISD::FCOS , MVT::f32, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp261 setOperationAction(ISD::FCOS, MVT::f128, Expand);
388 setOperationAction(ISD::FCOS, MVT::f32, Expand);
389 setOperationAction(ISD::FCOS, MVT::f64, Expand);
408 setOperationAction(ISD::FCOS, MVT::f16, Promote);
409 setOperationAction(ISD::FCOS, MVT::v4f16, Expand);
410 setOperationAction(ISD::FCOS, MVT::v8f16, Expand);
709 setOperationAction(ISD::FCOS, MVT::v1f64, Expand);
880 setOperationAction(ISD::FCOS, VT, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp94 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA})
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1437 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS,
1483 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp291 setOperationAction(ISD::FCOS , MVT::f64, Expand);
296 setOperationAction(ISD::FCOS , MVT::f32, Expand);
667 setOperationAction(ISD::FCOS, VT, Expand);
961 setOperationAction(ISD::FCOS , MVT::f128, Expand);
1023 setOperationAction(ISD::FCOS , MVT::v4f64, Expand);
1068 setOperationAction(ISD::FCOS , MVT::v4f32, Expand);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp436 setOperationAction(ISD::FCOS, MVT::f32, Expand);
437 setOperationAction(ISD::FCOS, MVT::f64, Expand);
H A DMipsSEISelLowering.cpp142 setOperationAction(ISD::FCOS, MVT::f16, Promote);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp350 setOperationAction(ISD::FCOS, VT, Expand);
799 setOperationAction(ISD::FCOS, MVT::v2f64, Expand);
820 setOperationAction(ISD::FCOS, MVT::v4f32, Expand);
836 setOperationAction(ISD::FCOS, MVT::v2f32, Expand);
965 setOperationAction(ISD::FCOS, MVT::f64, Expand);
1326 setOperationAction(ISD::FCOS, MVT::f32, Expand);
1327 setOperationAction(ISD::FCOS, MVT::f64, Expand);
1409 setOperationAction(ISD::FCOS, MVT::f16, Promote);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp164 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp572 for (const auto &Op : {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp537 setOperationAction(ISD::FCOS , VT, Expand);
568 setOperationAction(ISD::FCOS , MVT::f32, Expand);
574 setOperationAction(ISD::FCOS, MVT::f64, Expand);
589 setOperationAction(ISD::FCOS , VT, Expand);
655 setOperationAction(ISD::FCOS , MVT::f80, Expand);
705 setOperationAction(ISD::FCOS, MVT::f128, LibCall);
759 setOperationAction(ISD::FCOS, VT, Expand);
1972 ISD::FCOS, ISD::STRICT_FCOS,
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