Searched refs:Decoder (Results 1 - 21 of 21) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepDecoders.inc19 uint64_t, const void *Decoder) {
20 signedDecoder<4>(MI, tmp, Decoder);
24 uint64_t, const void *Decoder) {
25 signedDecoder<14>(MI, tmp, Decoder);
29 uint64_t, const void *Decoder) {
30 signedDecoder<8>(MI, tmp, Decoder);
34 uint64_t, const void *Decoder) {
35 signedDecoder<7>(MI, tmp, Decoder);
39 uint64_t, const void *Decoder) {
40 signedDecoder<12>(MI, tmp, Decoder);
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp78 const void *Decoder);
83 const void *Decoder);
86 uint64_t Address, const void *Decoder);
89 uint64_t Address, const void *Decoder);
94 const void *Decoder);
99 const void *Decoder);
104 const void *Decoder);
109 const void *Decoder);
114 const void *Decoder);
119 const void *Decoder);
198 DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
210 DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
222 DecodeBitpOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
233 DecodeNegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
274 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
344 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
357 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
370 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
383 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
397 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
410 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
423 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
437 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
508 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
522 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
536 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
549 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
562 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
575 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
588 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
602 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
617 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
631 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
645 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
665 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
679 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
699 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
718 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp85 const void *Decoder);
90 const void *Decoder);
95 const void *Decoder);
100 const void *Decoder);
105 const void *Decoder);
110 const void *Decoder);
115 const void *Decoder);
120 const void *Decoder);
125 const void *Decoder);
130 const void *Decoder);
411 DecodeUImmWithOffset(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
587 DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
634 DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
648 DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
662 DecodeAddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
701 DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
735 DecodeDaddiGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
774 DecodePOP37GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
808 DecodePOP65GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
847 DecodePOP75GroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
886 DecodeBlezlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
929 DecodeBgtzlGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
973 DecodeBgtzGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
1022 DecodeBlezGroupBranch(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
1066 DecodeDEXT(MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) argument
1108 DecodeDINS(MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) argument
1150 DecodeCRC(MCInst &MI, InsnType Insn, uint64_t Address, const void *Decoder) argument
1395 DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1402 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1414 DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1425 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1436 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1447 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1458 DecodePtrRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1468 DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1475 DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1487 DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1499 DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1510 DecodeFCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1521 DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1532 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1554 DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1575 DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1593 DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1610 DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1627 DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1644 DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1661 DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1676 DecodeSyncI_MM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1689 DecodeSynciR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1704 DecodeMSA128Mem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1750 DecodeMemMMImm4(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1808 DecodeMemMMSPImm5Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1824 DecodeMemMMGPImm7Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1840 DecodeMemMMReglistImm4Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1865 DecodeMemMMImm9(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1886 DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1921 DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1939 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1957 DecodeFMemMMR2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1975 DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1993 DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2011 DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2029 DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2045 DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2067 DecodeHWRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2078 DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2090 DecodeACC64DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2102 DecodeHI32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2114 DecodeLO32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2126 DecodeMSA128BRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2138 DecodeMSA128HRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2150 DecodeMSA128WRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2162 DecodeMSA128DRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2174 DecodeMSACtrlRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2186 DecodeCOP0RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2198 DecodeCOP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
2210 DecodeBranchTarget(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2219 DecodeBranchTarget1SImm16(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2228 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2237 DecodeBranchTarget21(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2247 DecodeBranchTarget21MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2257 DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2267 DecodeBranchTarget7MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2276 DecodeBranchTarget10MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2285 DecodeBranchTargetMM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2294 DecodeBranchTarget26MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) argument
2304 DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2313 DecodeJumpTargetXMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2322 DecodeAddiur2Simm7(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
2335 DecodeLi16Imm(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
2346 DecodePOOL16BEncodedField(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
2355 DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
2365 DecodeSImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) argument
2373 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2386 DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2392 DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2398 DecodeSimm9SP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2412 DecodeANDI16Imm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2451 DecodeRegListOperand16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2475 DecodeMovePOperands(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2501 DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, uint64_t Address, const void *Decoder) argument
2543 DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2550 DecodeBgtzGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
2599 DecodeBlezGroupBranchMMR6(MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp61 const void *Decoder) {
63 static_cast<const MCDisassembler *>(Decoder)
78 const void *Decoder) {
89 const void *Decoder) {
100 const void *Decoder) {
111 const void *Decoder) {
122 const void *Decoder) {
127 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder);
132 const void *Decoder) {
137 return DecodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder);
59 DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
76 DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
87 DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
98 DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
109 DecodeFPR64CRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
120 DecodeGPRNoX0RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
130 DecodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
140 DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
153 addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) argument
170 decodeUImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
179 decodeUImmNonZeroOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
188 decodeSImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
198 decodeSImmNonZeroOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
207 decodeSImmOperandAndLsl1(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
218 decodeCLUIImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
229 decodeFRMArg(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) argument
259 decodeRVCInstrSImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
269 decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
281 decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
294 decodeRVCInstrRdRs2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
303 decodeRVCInstrRdRs1Rs2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp42 const void *Decoder);
46 const void *Decoder);
49 const void *Decoder);
52 const void *Decoder);
55 const void *Decoder);
58 const void *Decoder);
61 const void *Decoder);
64 const void *Decoder);
67 const void *Decoder);
70 const void *Decoder);
314 DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
325 DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
343 DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
364 DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
385 DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
406 DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
427 DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
438 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
449 DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
471 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
482 DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
505 DecodeZPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument
516 DecodeZPR_4bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
524 DecodeZPR_3bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
543 DecodeZPR2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument
567 DecodeZPR3RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument
591 DecodeZPR4RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) argument
608 DecodePPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
618 DecodePPR_3bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void* Decoder) argument
638 DecodeVectorRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
660 DecodeQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
683 DecodeQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
706 DecodeQQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
727 DecodeDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
750 DecodeDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
773 DecodeDDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
783 DecodeFixedPointScaleImm32(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
792 DecodeFixedPointScaleImm64(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
799 DecodePCRelLabel19(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
815 DecodeMemExtend(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument
822 DecodeMRSSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument
832 DecodeMSRSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) argument
840 DecodeFMOVLaneInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
875 DecodeVecShiftR64Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
880 DecodeVecShiftR64ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
886 DecodeVecShiftR32Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
891 DecodeVecShiftR32ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
897 DecodeVecShiftR16Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
902 DecodeVecShiftR16ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
908 DecodeVecShiftR8Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
913 DecodeVecShiftL64Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
918 DecodeVecShiftL32Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
923 DecodeVecShiftL16Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
928 DecodeVecShiftL8Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
933 DecodeThreeAddrSRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
995 DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1028 DecodeUnsignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1089 DecodeSignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1287 DecodeExclusiveLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1370 DecodePairLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1504 DecodeAddSubERegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1561 DecodeLogicalImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1592 DecodeModImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1631 DecodeModImmTiedInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1649 DecodeAdrInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1668 DecodeAddSubImmShift(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1704 DecodeUnconditionalBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1721 DecodeSystemPStateInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1751 DecodeTestAndBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1775 DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegClassID, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
1789 DecodeWSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
1798 DecodeXSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) argument
1807 DecodeSVELogicalImmInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1825 DecodeSImm(llvm::MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) argument
1840 DecodeImm8OptLsl(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
1852 DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp148 const void *Decoder) {
159 const void *Decoder) {
171 const void *Decoder) {
183 const void *Decoder) {
195 const void *Decoder) {
209 const void *Decoder) {
219 const void *Decoder) {
228 const void *Decoder) {
237 const void *Decoder) {
245 uint64_t Address, const void *Decoder) {
145 DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
156 DecodeI64RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
168 DecodeFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
180 DecodeDFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
192 DecodeQFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
206 DecodeCPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
217 DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
226 DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
235 DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
244 DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
259 DecodeCPPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
370 DecodeMem(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder, bool isLoad, DecodeFunc DecodeRD) argument
417 DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
423 DecodeLoadIntPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
429 DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
435 DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
441 DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
447 DecodeLoadCP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
453 DecodeLoadCPPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
459 DecodeStoreInt(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
465 DecodeStoreIntPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
471 DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
477 DecodeStoreDFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
483 DecodeStoreQFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
489 DecodeStoreCP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
495 DecodeStoreCPPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) argument
501 tryAddingSymbolicOperand(int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder) argument
510 DecodeCall(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
520 DecodeSIMM13(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
527 DecodeJMPL(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
561 DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
589 DecodeSWAP(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
629 DecodeTRAP(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp76 const void *Decoder) {
77 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder);
94 const void *Decoder) {
100 const void *Decoder) {
106 const void *Decoder) {
112 const void *Decoder) {
118 const void *Decoder) {
124 const void *Decoder) {
130 const void *Decoder) {
136 const void *Decoder) {
73 tryAddingSymbolicOperand(int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.cpp23 // This layout is parsed by Decoder::dumpPackedEntry. No unwind bytecode is
37 // describing how to unwind the function (c.f. Decoder::decodeOpcodes).
45 // This layout is parsed by Decoder::dumpUnpackedEntry. Such an entry must
51 // up the bulk of the Decoder.
116 const size_t Decoder::PDataEntrySize = sizeof(RuntimeFunction);
119 const Decoder::RingEntry Decoder::Ring[] = {
120 { 0x80, 0x00, 1, &Decoder::opcode_0xxxxxxx }, // UOP_STACK_FREE (16-bit)
121 { 0xc0, 0x80, 2, &Decoder::opcode_10Lxxxxx }, // UOP_POP (32-bit)
122 { 0xf0, 0xc0, 1, &Decoder
[all...]
H A DARMWinEHPrinter.h21 class Decoder { class in namespace:llvm::ARM::WinEH
32 bool (Decoder::*Routine)(const uint8_t *, unsigned &, unsigned, bool);
156 Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), function in class:llvm::ARM::WinEH::Decoder
H A DCOFFDumper.cpp1588 ARM::WinEH::Decoder Decoder(W, Obj->getMachine() ==
1591 consumeError(Decoder.dumpProcedureData(*Obj));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp178 uint64_t Address, const void *Decoder);
180 uint64_t Address, const void *Decoder);
182 uint64_t Address, const void *Decoder);
184 uint64_t Address, const void *Decoder);
187 const void *Decoder);
190 const void *Decoder);
193 const void *Decoder);
195 MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder);
197 uint64_t Address, const void *Decoder);
199 uint64_t Address, const void *Decoder);
702 tryAddingSymbolicOperand(uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) argument
720 tryAddingPcLoadReferenceComment(uint64_t Address, int Value, const void *Decoder) argument
1127 DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1137 DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1152 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1165 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1180 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1198 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1207 DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1219 DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1234 DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1245 DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1275 DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1300 DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1310 DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1326 DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1341 DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1348 DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1356 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1370 DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1390 DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1411 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
1423 DecodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1440 DecodeCCOutOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1449 DecodeSORegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1486 DecodeSORegRegOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1521 DecodeRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1568 DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1592 DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1617 DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1644 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1823 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
1928 DecodeSORegMemOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
1972 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2163 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2192 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2215 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2307 DecodeHINTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2329 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2376 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2418 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2442 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2469 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2497 DecodeTSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2518 DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2546 DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2566 DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2586 DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2606 DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2612 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2639 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2664 DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
2681 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2957 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2970 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2985 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
2998 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3008 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3278 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3325 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3373 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3408 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3461 DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3507 DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3535 DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3560 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3579 DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3585 DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3591 DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3597 DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3603 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3639 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
3663 DecodeThumbBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3671 DecodeT2BROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3679 DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3687 DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3702 DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3716 DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3726 DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3734 DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
3763 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
3846 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
3930 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4010 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4049 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument
4102 DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4116 DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4131 DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4146 DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4162 DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) argument
4177 DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4190 DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4204 DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4251 DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4268 DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4286 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4347 DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4373 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4384 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4409 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument
4420 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4433 DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4448 DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4470 DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4494 DecodeCoprocessor(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4510 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4526 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4568 DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4600 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4608 DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4632 DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4641 DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4650 DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4732 DecodeBankedReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
4747 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4768 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4794 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4819 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4846 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4871 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4896 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
4963 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5028 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5095 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5158 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5228 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5291 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5372 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5444 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5470 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5496 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5526 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5563 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5597 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument
5623 DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument
5634 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5661 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5720 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5779 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
5812 DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5839 DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5884 DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5936 DecodeBFLabelOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5955 DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5967 DecodePredNoALOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
5976 DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6038 DecodeLongShiftOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6051 DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6061 DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6071 DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6097 DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6113 DecodeQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6129 DecodeQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6140 DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6171 DecodeVpredROperand(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
6183 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6191 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6214 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6222 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6253 DecodeVCVTImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6296 DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6339 DecodeMVE_MEM_pre( MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder, unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder) argument
6359 DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6368 DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6377 DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6386 DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6399 DecodeExpandedImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6409 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
6419 DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6442 DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6467 DecodeMVEOverlappingLongShift( MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6546 DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6566 DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6603 DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6613 DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
6621 DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp52 const void *Decoder);
55 uint64_t Address, const void *Decoder);
58 uint64_t Address, const void *Decoder);
61 uint64_t Address, const void *Decoder);
64 const void *Decoder);
68 const void *Decoder);
71 uint64_t Address, const void *Decoder);
165 const void * /*Decoder*/) {
175 uint64_t Address, const void *Decoder) {
187 uint64_t Address, const void *Decoder) {
174 decodeRiMemoryValue(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
186 decodeRrMemoryValue(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
198 decodeSplsValue(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
210 tryAddingSymbolicOperand(int64_t Value, bool IsBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder) argument
219 decodeBranch(MCInst &MI, unsigned Insn, uint64_t Address, const void *Decoder) argument
227 decodeShiftImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
235 decodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp65 const void *Decoder) {
84 const void *Decoder) {
90 const void *Decoder) {
96 const void *Decoder) {
102 const void *Decoder) {
108 const void *Decoder) {
114 const void *Decoder) {
120 const void *Decoder) {
126 const void *Decoder) {
132 const void *Decoder) {
63 DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp88 const void *Decoder = nullptr);
93 const void *Decoder = nullptr);
97 uint64_t Address, const void *Decoder);
122 const void *Decoder) {
135 const void *Decoder) {
140 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
169 uint64_t Value, const void *Decoder) {
172 auto Disassembler = static_cast<const MCDisassembler *>(Decoder);
179 uint64_t Offset, const void *Decoder) {
182 if (!DecodeSymbolicOperand(Inst, Address, nextAddress, Decoder))
120 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
133 DecodeGBR32ShortRegister(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
168 DecodeSymbolicOperand(MCInst &Inst, uint64_t Address, uint64_t Value, const void *Decoder) argument
178 DecodeSymbolicOperandOff(MCInst &Inst, uint64_t Address, uint64_t Offset, const void *Decoder) argument
187 DecodeBranchTargetS(MCInst &Inst, unsigned InsnS, uint64_t Address, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp81 static HexagonDisassembler const &disassembler(void const *Decoder) { argument
82 return *static_cast<HexagonDisassembler const *>(Decoder);
85 static void signedDecoder(MCInst &MI, unsigned tmp, const void *Decoder) { argument
86 HexagonDisassembler const &Disassembler = disassembler(Decoder);
98 const void *Decoder);
102 const void *Decoder);
105 const void *Decoder);
108 const void *Decoder);
111 const void *Decoder);
114 uint64_t Address, const void *Decoder);
531 DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
537 DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
552 DecodeGeneralSubRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
566 DecodeHvxVRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
581 DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
593 DecodeGeneralDoubleLow8RegsRegisterClass( MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
602 DecodeHvxWRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
615 DecodeHvxVQRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
626 DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
635 DecodeHvxQRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
644 DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
672 DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
700 DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
718 unsignedImmDecoder(MCInst &MI, unsigned tmp, uint64_t , const void *Decoder) argument
728 s32_0ImmDecoder(MCInst &MI, unsigned tmp, uint64_t , const void *Decoder) argument
738 brtargetDecoder(MCInst &MI, unsigned tmp, uint64_t Address, const void *Decoder) argument
752 DecodeGuestRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
778 DecodeGuestRegs64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t , const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp61 uint64_t Address, const void *Decoder) {
66 uint64_t Address, const void *Decoder) {
71 uint64_t Address, const void *Decoder) {
153 const void *Decoder);
60 DecodeGPR8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
65 DecodeLD8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
70 DecodePTRREGSRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp91 uint64_t Addr, const void *Decoder) {
92 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder);
105 uint64_t Addr, const void *Decoder) {
106 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder);
114 const void *Decoder) { \
115 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); \
152 const void *Decoder) {
153 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder);
160 const void *Decoder) {
161 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder);
90 decodeSoppBrTarget(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
104 decodeBoolReg(MCInst &Inst, unsigned Val, uint64_t Addr, const void *Decoder) argument
149 decodeOperand_VSrc16(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
157 decodeOperand_VSrcV216(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
165 decodeOperand_VS_16(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
173 decodeOperand_VS_32(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
181 decodeOperand_AReg_128(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
189 decodeOperand_AReg_512(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
197 decodeOperand_AReg_1024(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
205 decodeOperand_SReg_32(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
213 decodeOperand_VGPR_32(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp75 const void *Decoder) {
93 const void *Decoder) {
103 const void *Decoder);
107 const void *Decoder);
112 const void *Decoder) {
130 const void *Decoder) {
134 if (DecodeGR16RegisterClass(MI, Reg, Address, Decoder) !=
73 DecodeGR8RegisterClass(MCInst &MI, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
91 DecodeGR16RegisterClass(MCInst &MI, uint64_t RegNo, uint64_t Address, const void *Decoder) argument
111 DecodeCGImm(MCInst &MI, uint64_t Bits, uint64_t Address, const void *Decoder) argument
128 DecodeMemOperand(MCInst &MI, uint64_t Bits, uint64_t Address, const void *Decoder) argument
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DFixedLenDecoderEmitter.cpp1 //===------------ FixedLenDecoderEmitter.cpp - Decoder Generator ----------===//
66 std::string Decoder; member in struct:__anon2923::OperandInfo
71 : Decoder(std::move(D)), HasCompleteDecoder(HCD), InitValue(0) {}
865 // Decoder index.
972 << "Address, const void *Decoder, bool &DecodeComplete) {\n";
979 for (const auto &Decoder : Decoders) {
981 OS << Decoder;
1107 const std::string &Decoder = OpInfo.Decoder;
1125 if (Decoder !
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp102 const void * /*Decoder*/) {
117 const void * /*Decoder*/) {
127 uint64_t Address, const void *Decoder) {
220 const void *Decoder);
126 decodeMemoryOpValue(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1800 const void *Decoder) {
1801 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder);
1799 tryAddingPcLoadReferenceComment(uint64_t Address, uint64_t Value, const void *Decoder) argument

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