Lines Matching refs:Decoder
85 const void *Decoder);
90 const void *Decoder);
95 const void *Decoder);
100 const void *Decoder);
105 const void *Decoder);
110 const void *Decoder);
115 const void *Decoder);
120 const void *Decoder);
125 const void *Decoder);
130 const void *Decoder);
135 const void *Decoder);
140 const void *Decoder);
144 const void *Decoder);
149 const void *Decoder);
154 const void *Decoder);
159 const void *Decoder);
164 const void *Decoder);
169 const void *Decoder);
174 const void *Decoder);
179 const void *Decoder);
184 const void *Decoder);
189 const void *Decoder);
194 const void *Decoder);
199 const void *Decoder);
204 const void *Decoder);
209 const void *Decoder);
214 const void *Decoder);
219 const void *Decoder);
224 const void *Decoder);
229 const void *Decoder);
234 const void *Decoder);
241 const void *Decoder);
248 const void *Decoder);
255 const void *Decoder);
262 const void *Decoder);
269 const void *Decoder);
276 const void *Decoder);
281 const void *Decoder);
286 const void *Decoder);
291 const void *Decoder);
294 const void *Decoder);
299 const void *Decoder);
304 const void *Decoder);
309 const void *Decoder);
314 const void *Decoder);
319 const void *Decoder);
324 const void *Decoder);
327 uint64_t Address, const void *Decoder);
332 const void *Decoder);
337 const void *Decoder);
342 const void *Decoder);
347 const void *Decoder);
352 const void *Decoder);
357 const void *Decoder);
362 const void *Decoder);
366 const void *Decoder);
370 const void *Decoder);
373 const void *Decoder);
376 const void *Decoder);
379 uint64_t Address, const void *Decoder);
383 const void *Decoder);
388 const void *Decoder);
393 const void *Decoder);
398 const void *Decoder);
403 const void *Decoder);
408 const void *Decoder);
413 const void *Decoder) {
415 Decoder);
421 const void *Decoder);
426 const void *Decoder);
429 uint64_t Address, const void *Decoder);
432 uint64_t Address, const void *Decoder);
435 uint64_t Address, const void *Decoder);
438 uint64_t Address, const void *Decoder);
441 uint64_t Address, const void *Decoder);
447 const void *Decoder);
451 uint64_t Address, const void *Decoder);
455 const void *Decoder);
459 uint64_t Address, const void *Decoder);
463 const void *Decoder);
468 const void *Decoder);
473 const void *Decoder);
478 const void *Decoder);
483 const void *Decoder);
488 const void *Decoder);
493 const void *Decoder);
498 const void *Decoder);
503 const void *Decoder);
508 const void *Decoder);
513 const void *Decoder);
518 const void *Decoder);
523 const void *Decoder);
527 const void *Decoder);
531 const void *Decoder);
535 const void *Decoder);
539 const void *Decoder);
543 const void *Decoder);
547 const void *Decoder);
550 uint64_t Address, const void *Decoder);
588 const void *Decoder) {
615 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
618 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
625 if (RegDecoder(MI, tmp, Address, Decoder) == MCDisassembler::Fail)
635 uint64_t Address, const void *Decoder) {
638 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
640 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
649 const void *Decoder) {
652 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
654 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID,
664 const void *Decoder) {
690 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
693 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
703 const void *Decoder) {
710 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
712 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
717 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
719 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
724 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
737 const void *Decoder) {
763 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
766 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
776 const void *Decoder) {
783 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
785 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
790 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
792 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
797 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
810 const void *Decoder) {
835 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
838 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
849 const void *Decoder) {
874 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
877 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
888 const void *Decoder) {
917 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
920 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
931 const void *Decoder) {
961 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
964 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
975 const void *Decoder) {
1009 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1013 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1024 const void *Decoder) {
1053 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1055 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1067 const void *Decoder) {
1096 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
1098 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
1109 const void *Decoder) {
1139 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rt)));
1141 MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, Rs)));
1151 const void *Decoder) {
1154 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1156 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1158 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID,
1398 const void *Decoder) {
1405 const void *Decoder) {
1409 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo);
1417 const void *Decoder) {
1420 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo);
1428 const void *Decoder) {
1431 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo);
1439 const void *Decoder) {
1442 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo);
1450 const void *Decoder) {
1453 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo);
1461 const void *Decoder) {
1462 if (static_cast<const MipsDisassembler *>(Decoder)->isGP64())
1463 return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder);
1465 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1471 const void *Decoder) {
1472 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);
1478 const void *Decoder) {
1482 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo);
1490 const void *Decoder) {
1494 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo);
1502 const void *Decoder) {
1505 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo);
1513 const void *Decoder) {
1516 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo);
1523 const void *Decoder) {
1527 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo);
1535 const void *Decoder) {
1540 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1541 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1557 const void *Decoder) {
1562 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1563 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1578 const void *Decoder) {
1583 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1584 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1596 const void *Decoder) {
1601 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1613 const void *Decoder) {
1618 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1630 const void *Decoder) {
1635 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1647 const void *Decoder) {
1652 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1664 const void *Decoder) {
1668 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1677 uint64_t Address, const void *Decoder) {
1681 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1692 const void *Decoder) {
1696 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1705 uint64_t Address, const void *Decoder) {
1710 Reg = getReg(Decoder, Mips::MSA128BRegClassID, Reg);
1711 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1753 const void *Decoder) {
1762 if (DecodeGPRMM16RegisterClass(Inst, Reg, Address, Decoder)
1772 if (DecodeGPRMM16ZeroRegisterClass(Inst, Reg, Address, Decoder)
1778 if (DecodeGPRMM16RegisterClass(Inst, Base, Address, Decoder)
1811 const void *Decoder) {
1815 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1827 const void *Decoder) {
1831 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1843 const void *Decoder) {
1855 if (DecodeRegListOperand16(Inst, Insn, Address, Decoder)
1868 const void *Decoder) {
1873 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1874 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1889 const void *Decoder) {
1894 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1895 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1900 if (DecodeRegListOperand(Inst, Insn, Address, Decoder)
1924 const void *Decoder) {
1929 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg);
1930 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1942 const void *Decoder) {
1947 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1948 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1958 uint64_t Address, const void *Decoder) {
1965 Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg);
1966 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1978 const void *Decoder) {
1983 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
1984 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
1996 const void *Decoder) {
2001 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg);
2002 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
2014 const void *Decoder) {
2019 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
2020 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
2030 uint64_t Address, const void *Decoder) {
2035 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg);
2036 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
2048 const void *Decoder) {
2053 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt);
2054 Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
2070 const void *Decoder) {
2081 const void *Decoder) {
2085 unsigned Reg = getReg(Decoder, Mips::AFGR64RegClassID, RegNo /2);
2093 const void *Decoder) {
2097 unsigned Reg = getReg(Decoder, Mips::ACC64DSPRegClassID, RegNo);
2105 const void *Decoder) {
2109 unsigned Reg = getReg(Decoder, Mips::HI32DSPRegClassID, RegNo);
2117 const void *Decoder) {
2121 unsigned Reg = getReg(Decoder, Mips::LO32DSPRegClassID, RegNo);
2129 const void *Decoder) {
2133 unsigned Reg = getReg(Decoder, Mips::MSA128BRegClassID, RegNo);
2141 const void *Decoder) {
2145 unsigned Reg = getReg(Decoder, Mips::MSA128HRegClassID, RegNo);
2153 const void *Decoder) {
2157 unsigned Reg = getReg(Decoder, Mips::MSA128WRegClassID, RegNo);
2165 const void *Decoder) {
2169 unsigned Reg = getReg(Decoder, Mips::MSA128DRegClassID, RegNo);
2177 const void *Decoder) {
2181 unsigned Reg = getReg(Decoder, Mips::MSACtrlRegClassID, RegNo);
2189 const void *Decoder) {
2193 unsigned Reg = getReg(Decoder, Mips::COP0RegClassID, RegNo);
2201 const void *Decoder) {
2205 unsigned Reg = getReg(Decoder, Mips::COP2RegClassID, RegNo);
2213 const void *Decoder) {
2222 const void *Decoder) {
2231 const void *Decoder) {
2240 const void *Decoder) {
2250 const void *Decoder) {
2260 const void *Decoder) {
2270 const void *Decoder) {
2279 const void *Decoder) {
2288 const void *Decoder) {
2297 const void *Decoder) {
2307 const void *Decoder) {
2316 const void *Decoder) {
2325 const void *Decoder) {
2338 const void *Decoder) {
2349 const void *Decoder) {
2357 const void *Decoder) {
2367 const void *Decoder) {
2376 const void *Decoder) {
2387 uint64_t Address, const void *Decoder) {
2393 uint64_t Address, const void *Decoder) {
2399 uint64_t Address, const void *Decoder) {
2413 uint64_t Address, const void *Decoder) {
2425 const void *Decoder) {
2453 const void *Decoder) {
2477 const void *Decoder) {
2479 if (DecodeMovePRegPair(Inst, RegPair, Address, Decoder) ==
2484 if (static_cast<const MipsDisassembler*>(Decoder)->hasMips32r6())
2489 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRs, Address, Decoder) ==
2494 if (DecodeGPRMM16MovePRegisterClass(Inst, RegRt, Address, Decoder) ==
2502 uint64_t Address, const void *Decoder) {
2544 uint64_t Address, const void *Decoder) {
2552 const void *Decoder) {
2587 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2591 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
2601 const void *Decoder) {
2632 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rs)));
2634 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));