/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 77 case D7: case D6: case D5: case D4:
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H A D | ARMCallingConv.cpp | 163 ARM::D4, ARM::D5, ARM::D6, ARM::D7 };
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/freebsd-11-stable/lib/msun/ld128/ |
H A D | s_expl.c | 174 D4 = 4.16666666666666666666666666634228324e-2L, variable 251 q = x * x2 * D3 + x2 * x2 * (D4 + x * (D5 + x * (D6 +
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | X86RecognizableInstr.h | 47 MAP(D4, 84) \
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.cpp | 33 AArch64::D3, AArch64::D4, AArch64::D5,
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H A D | AArch64PBQPRegAlloc.cpp | 114 case AArch64::D4:
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H A D | AArch64FastISel.cpp | 3015 { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.h | 115 case AArch64::D4: return AArch64::B4; 155 case AArch64::B4: return AArch64::D4;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonRegisterInfo.cpp | 63 D0, D1, D2, D3, D4, D5, D6, D7, 0
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H A D | HexagonISelLowering.cpp | 279 .Case("r9:8", Hexagon::D4)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 167 {codeview::RegisterId::ARM64_D4, AArch64::D4},
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/freebsd-11-stable/crypto/openssl/crypto/ec/asm/ |
H A D | ecp_nistz256-avx2.pl | 307 my ($D0,$D1,$D2,$D3, $D4,$D5,$D6,$D7, $D8)=map("%ymm$_",(0..8)); 340 vmovdqa 32*4-160(%rax), $D4 353 vpsllq \$52, $D4, $T1 357 vpsrlq \$12, $D4, $D4 360 vpaddq $D4, $D5, $D5
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/freebsd-11-stable/sys/dev/fe/ |
H A D | if_fe.c | 565 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \ 566 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
H A D | HexagonDisassembler.cpp | 586 Hexagon::D4, Hexagon::D5, Hexagon::D6, Hexagon::D7,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 83 SP::D4, SP::D20, SP::D5, SP::D21,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
H A D | SparcAsmParser.cpp | 150 Sparc::D4, Sparc::D5, Sparc::D6, Sparc::D7,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 334 AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4,
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/freebsd-11-stable/contrib/amd/doc/ |
H A D | texinfo.tex | 9296 \DeclareUnicodeCharacter{00D4}{\^O} 9464 \DeclareUnicodeCharacter{01D4}{\v{u}}
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 1317 ARM::D4, ARM::D5, ARM::D6, ARM::D7,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 3235 case Mips::D4: return Mips::F9;
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