Searched refs:CopyFromReg (Results 1 - 22 of 22) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp84 case ISD::CopyFromReg: NumberDeps++; break;
121 case ISD::CopyFromReg: break;
444 case ISD::CopyFromReg:
549 case ISD::CopyFromReg:
H A DStatepointLowering.cpp333 // get_return_value can either be a sequence of CopyFromReg instructions
342 while (CallEnd->getOpcode() == ISD::CopyFromReg)
976 // different, and getValue() will use CopyFromReg of the wrong type,
982 SDValue CopyFromReg = getCopyFromRegs(I, RetTy); local
984 assert(CopyFromReg.getNode());
985 setValue(&CI, CopyFromReg);
H A DScheduleDAGRRList.cpp322 // Special handling for CopyFromReg of untyped values.
323 if (!Node->isMachineOpcode() && Node->getOpcode() == ISD::CopyFromReg) {
655 // FIXME: Nodes such as CopyFromReg probably should not advance the current
711 case ISD::CopyFromReg:
1279 if (N->getOpcode() == ISD::CopyFromReg) {
1280 // CopyFromReg has: "chain, Val, glue" so operand 1 gives the type.
2271 if (PN->getOpcode() == ISD::CopyFromReg) {
2355 /// CopyFromReg from a virtual register.
2362 PredSU->getNode()->getOpcode() == ISD::CopyFromReg) {
2397 // set isVRegCycle for its CopyFromReg operand
[all...]
H A DInstrEmitter.cpp83 /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
335 // with CopyFromReg nodes, so don't emit kill flags for them.
341 Op.getNode()->getOpcode() != ISD::CopyFromReg &&
919 // virtual registers, we emit a CopyFromReg for one of the implicitly
922 // 2. A CopyFromReg reading a physreg may be glued to this instruction.
947 if (F->getOpcode() == ISD::CopyFromReg) {
1018 case ISD::CopyFromReg: {
H A DScheduleDAGSDNodes.cpp122 if (Def->getOpcode() == ISD::CopyFromReg &&
547 if (Node->getOpcode() == ISD::CopyFromReg)
H A DSelectionDAGDumper.cpp171 case ISD::CopyFromReg: return "CopyFromReg";
H A DScheduleDAGFast.cpp428 if (N->getOpcode() == ISD::CopyFromReg) {
429 // CopyFromReg has: "chain, Val, glue" so operand 1 gives the type.
H A DSelectionDAGBuilder.cpp1400 /// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise.
1423 // to do this first, so that we don't create a CopyFromReg if we already
5524 case ISD::CopyFromReg: {
8846 if (HasDef && (CallEnd->getOpcode() == ISD::CopyFromReg))
9425 assert((Op.getOpcode() != ISD::CopyFromReg ||
9929 if (Res.getOpcode() == ISD::CopyFromReg && isSwiftErrorArg) {
9938 if (Res.getOpcode() == ISD::CopyFromReg) {
H A DSelectionDAGISel.cpp2797 case ISD::CopyFromReg:
H A DDAGCombiner.cpp1866 case ISD::CopyFromReg:
7352 bool IsCopyOrSelect = BinOpLHSVal.getOpcode() == ISD::CopyFromReg ||
20974 case ISD::CopyFromReg:
20975 // Always forward past past CopyFromReg.
H A DTargetLowering.cpp91 // (We look for a CopyFromReg reading a virtual register that is used
94 if (Value->getOpcode() != ISD::CopyFromReg)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp250 if (CopyFromRegOp->getOpcode() == ISD::CopyFromReg) {
300 SDValue CopyFromReg = local
303 OutOps.push_back(CopyFromReg);
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h173 /// CopyFromReg - This node indicates that the input value is a virtual or
176 CopyFromReg, enumerator in enum:llvm::ISD::NodeType
H A DSelectionDAG.h732 return getNode(ISD::CopyFromReg, dl, VTs, Ops);
742 return getNode(ISD::CopyFromReg, dl, VTs,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h287 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
294 Opc != ISD::CopyFromReg;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp392 if (OtherOp->getOpcode() == ISD::CopyFromReg &&
2107 RHS.getNode()->getOpcode() == ISD::CopyFromReg ||
H A DX86ISelLowering.cpp4397 if (Arg.getOpcode() == ISD::CopyFromReg) {
10955 // t2: v4i64,ch = CopyFromReg t0, Register:v4i64 %0
22336 // Blacklist CopyFromReg to avoid partial register stalls.
22337 T1.getOpcode() != ISD::CopyFromReg && T2.getOpcode()!=ISD::CopyFromReg){
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1307 // CopyFromReg previous node to avoid duplicate copies.
1310 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg)
1313 // But usually we'll create a new CopyFromReg for a different register.
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp10864 assert(N->getOpcode() == ISD::CopyFromReg);
10871 } while (N->getOpcode() == ISD::CopyFromReg);
10879 case ISD::CopyFromReg:
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp3117 // of the CopyFromReg, or else we can't replace the CopyFromReg with
3132 if (Ptr.getOpcode() == ISD::CopyFromReg &&
H A DARMISelLowering.cpp2550 if (Arg.getOpcode() == ISD::CopyFromReg) {
5729 // t2: f32,ch = CopyFromReg t0, Register:f32 %0
5732 if (Op.getOpcode() != ISD::CopyFromReg ||
5741 SDValue Copy = DAG.getNode(ISD::CopyFromReg, SDLoc(Op), MVT::f16, Ops);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4225 return AddrOp.getOpcode() == ISD::CopyFromReg;

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