Searched refs:Cond (Results 1 - 25 of 270) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DSimpleConstraintManager.cpp26 DefinedSVal Cond,
29 if (Optional<Loc> LV = Cond.getAs<Loc>()) {
38 Cond = SVB.evalCast(*LV, SVB.getContext().BoolTy, T).castAs<DefinedSVal>();
41 return assume(State, Cond.castAs<NonLoc>(), Assumption);
45 NonLoc Cond, bool Assumption) {
46 State = assumeAux(State, Cond, Assumption);
48 return SU->processAssume(State, Cond, Assumption);
53 NonLoc Cond,
58 if (!canReasonAbout(Cond)) {
60 SymbolRef Sym = Cond
25 assume(ProgramStateRef State, DefinedSVal Cond, bool Assumption) argument
44 assume(ProgramStateRef State, NonLoc Cond, bool Assumption) argument
52 assumeAux(ProgramStateRef State, NonLoc Cond, bool Assumption) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrInfo.cpp105 SmallVectorImpl<MachineOperand> &Cond,
123 Cond.push_back(MachineOperand::CreateImm(true));
124 Cond.push_back(MI.getOperand(1));
131 Cond.push_back(MachineOperand::CreateImm(false));
132 Cond.push_back(MI.getOperand(1));
145 Cond.push_back(MachineOperand::CreateImm(true));
146 Cond.push_back(MI.getOperand(2));
182 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const {
185 if (Cond.empty()) {
193 assert(Cond
102 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool ) const argument
180 insertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
[all...]
H A DWebAssemblyLowerBrUnless.cpp71 Register Cond = MI->getOperand(1).getReg(); local
75 if (MFI.isVRegStackified(Cond)) {
76 assert(MRI.hasOneDef(Cond));
77 MachineInstr *Def = MRI.getVRegDef(Cond);
178 Cond = Def->getOperand(1).getReg();
193 .addReg(Cond);
195 Cond = Tmp;
204 .addReg(Cond);
H A DWebAssemblyInstrInfo.h58 SmallVectorImpl<MachineOperand> &Cond,
63 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
67 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DGuardUtils.h38 /// *set* it's condition such that (only) 'Cond' is known to hold on the taken
40 void setWidenableBranchCond(BranchInst *WidenableBR, Value *Cond);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLibCallsShrinkWrap.cpp95 void shrinkWrapCI(CallInst *CI, Value *Cond);
138 Value *Cond = nullptr; local
149 Cond = createOrCond(CI, CmpInst::FCMP_OLT, -1.0f, CmpInst::FCMP_OGT, 1.0f);
160 Cond = createOrCond(CI, CmpInst::FCMP_OEQ, INFINITY, CmpInst::FCMP_OEQ,
169 Cond = createCond(CI, CmpInst::FCMP_OLT, 1.0f);
177 Cond = createCond(CI, CmpInst::FCMP_OLT, 0.0f);
183 shrinkWrapCI(CI, Cond);
190 Value *Cond = nullptr; local
208 Cond = generateTwoRangeCond(CI, Func);
215 Cond
228 Value *Cond = nullptr; local
476 Value *Cond = BBBuilder.CreateFCmp(CmpInst::FCMP_OGT, Exp, V); local
485 shrinkWrapCI(CallInst *CI, Value *Cond) argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.h58 SmallVectorImpl<MachineOperand> &Cond,
63 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
H A DNVPTXInstrInfo.cpp98 SmallVectorImpl<MachineOperand> &Cond,
116 Cond.push_back(LastInst.getOperand(0));
134 Cond.push_back(SecondLastInst.getOperand(0));
183 ArrayRef<MachineOperand> Cond,
190 assert((Cond.size() == 1 || Cond.size() == 0) &&
195 if (Cond.empty()) // Unconditional branch
198 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg())
204 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB);
95 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
180 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
/freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DSimpleConstraintManager.h39 ProgramStateRef assume(ProgramStateRef State, DefinedSVal Cond,
82 ProgramStateRef assume(ProgramStateRef State, NonLoc Cond, bool Assumption);
84 ProgramStateRef assumeAux(ProgramStateRef State, NonLoc Cond,
H A DConstraintManager.h86 DefinedSVal Cond,
93 ProgramStatePair assumeDual(ProgramStateRef State, DefinedSVal Cond) { argument
94 ProgramStateRef StTrue = assume(State, Cond, true);
96 // If StTrue is infeasible, asserting the falseness of Cond is unnecessary
104 assert(assume(State, Cond, false) && "System is over constrained.");
109 ProgramStateRef StFalse = assume(State, Cond, false);
133 // If StTrue is infeasible, asserting the falseness of Cond is unnecessary
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.h58 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
62 SmallVectorImpl<MachineOperand> &Cond,
68 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
H A DMSP430InstrInfo.cpp132 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
133 assert(Cond.size() == 1 && "Invalid Xbranch condition!");
135 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm());
159 Cond[0].setImm(CC);
178 SmallVectorImpl<MachineOperand> &Cond,
213 Cond.clear();
237 if (Cond.empty()) {
240 Cond.push_back(MachineOperand::CreateImm(BranchCode));
246 assert(Cond.size() == 1);
254 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[
175 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
265 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.h69 SmallVectorImpl<MachineOperand> &Cond,
76 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
81 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.h54 SmallVectorImpl<MachineOperand> &Cond,
58 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
82 SmallVectorImpl<MachineOperand> &Cond) const override;
H A DXCoreInstrInfo.cpp192 SmallVectorImpl<MachineOperand> &Cond,
220 Cond.push_back(MachineOperand::CreateImm(BranchCode));
221 Cond.push_back(LastInst->getOperand(0));
241 Cond.push_back(MachineOperand::CreateImm(BranchCode));
242 Cond.push_back(SecondLastInst->getOperand(0));
274 ArrayRef<MachineOperand> Cond,
279 assert((Cond.size() == 2 || Cond.size() == 0) &&
284 if (Cond.empty()) {
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[
189 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
271 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DGuardUtils.cpp66 auto *Cond = BI->getCondition();
67 if (!Cond->hasOneUse())
73 if (match(Cond, m_Intrinsic<Intrinsic::experimental_widenable_condition>())) {
85 if (!match(Cond, m_And(m_Value(A), m_Value(B))))
87 auto *And = dyn_cast<Instruction>(Cond);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h65 SmallVectorImpl<MachineOperand> &Cond,
72 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
77 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
81 SmallVectorImpl<MachineOperand> &Cond,
175 SmallVectorImpl<MachineOperand> &Cond) const;
178 const DebugLoc &DL, ArrayRef<MachineOperand> Cond) const;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.h55 SmallVectorImpl<MachineOperand> &Cond,
59 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
82 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
H A DARCInstrInfo.cpp173 SmallVectorImpl<MachineOperand> &Cond,
202 if (!Cond.empty())
208 Cond.push_back(I->getOperand(1));
209 Cond.push_back(I->getOperand(2));
210 Cond.push_back(I->getOperand(3));
225 Cond.clear();
351 SmallVectorImpl<MachineOperand> &Cond) const {
352 assert((Cond.size() == 3) && "Invalid ARC branch condition!");
353 Cond[2].setImm(GetOppositeBranchCondition((ARCCC::CondCode)Cond[
170 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
370 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &dl, int *BytesAdded) const argument
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DGuardUtils.h49 bool parseWidenableBranch(User *U, Use *&Cond, Use *&WC, BasicBlock *&IfTrueBB,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/
H A DParallel.cpp66 Cond.notify_all();
89 Cond.notify_one();
96 Cond.wait(Lock, [&] { return Stop || !WorkStack.empty(); });
109 std::condition_variable Cond; member in class:llvm::parallel::detail::__anon1991::ThreadPoolExecutor
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.h50 SmallVectorImpl<MachineOperand> &Cond,
56 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetFeatureInfo.cpp132 StringRef Cond = Comma.first; local
133 if (Cond[0] == '!') {
135 Cond = Cond.substr(1);
141 OS << "FB[" << TargetName << "::" << Cond << "])"; local
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIAnnotateControlFlow.cpp99 handleLoopCondition(Value *Cond, PHINode *Broken, llvm::Loop *L,
231 Value *Cond, PHINode *Broken, llvm::Loop *L, BranchInst *Term) {
232 if (Instruction *Inst = dyn_cast<Instruction>(Cond)) {
241 Value *Args[] = { Cond, Broken };
246 if (isa<Constant>(Cond)) {
247 Instruction *Insert = Cond == BoolTrue ?
250 Value *Args[] = { Cond, Broken };
270 Value *Cond = Term->getCondition(); local
272 Value *Arg = handleLoopCondition(Cond, Broken, L, Term);
230 handleLoopCondition( Value *Cond, PHINode *Broken, llvm::Loop *L, BranchInst *Term) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.h94 SmallVectorImpl<MachineOperand> &Cond,
97 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
103 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;

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