1285163Sdim//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=// 2285163Sdim// 3353358Sdim// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4353358Sdim// See https://llvm.org/LICENSE.txt for license information. 5353358Sdim// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6285163Sdim// 7285163Sdim//===----------------------------------------------------------------------===// 8285163Sdim/// 9285163Sdim/// \file 10341825Sdim/// This file contains the WebAssembly implementation of the 11285163Sdim/// TargetInstrInfo class. 12285163Sdim/// 13285163Sdim//===----------------------------------------------------------------------===// 14285163Sdim 15285163Sdim#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H 16285163Sdim#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H 17285163Sdim 18285163Sdim#include "WebAssemblyRegisterInfo.h" 19360784Sdim#include "llvm/ADT/ArrayRef.h" 20327952Sdim#include "llvm/CodeGen/TargetInstrInfo.h" 21285163Sdim 22296417Sdim#define GET_INSTRINFO_HEADER 23296417Sdim#include "WebAssemblyGenInstrInfo.inc" 24296417Sdim 25353358Sdim#define GET_INSTRINFO_OPERAND_ENUM 26353358Sdim#include "WebAssemblyGenInstrInfo.inc" 27353358Sdim 28285163Sdimnamespace llvm { 29285163Sdim 30353358Sdimnamespace WebAssembly { 31353358Sdim 32353358Sdimint16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex); 33353358Sdim 34353358Sdim} 35353358Sdim 36285163Sdimclass WebAssemblySubtarget; 37285163Sdim 38296417Sdimclass WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo { 39285163Sdim const WebAssemblyRegisterInfo RI; 40285163Sdim 41285163Sdimpublic: 42285163Sdim explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI); 43285163Sdim 44285163Sdim const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; } 45296417Sdim 46309124Sdim bool isReallyTriviallyReMaterializable(const MachineInstr &MI, 47360784Sdim AAResults *AA) const override; 48309124Sdim 49296417Sdim void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 50360784Sdim const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, 51296417Sdim bool KillSrc) const override; 52309124Sdim MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI, 53309124Sdim unsigned OpIdx1, 54309124Sdim unsigned OpIdx2) const override; 55296417Sdim 56309124Sdim bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 57296417Sdim MachineBasicBlock *&FBB, 58296417Sdim SmallVectorImpl<MachineOperand> &Cond, 59296417Sdim bool AllowModify = false) const override; 60314564Sdim unsigned removeBranch(MachineBasicBlock &MBB, 61314564Sdim int *BytesRemoved = nullptr) const override; 62314564Sdim unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 63296417Sdim MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, 64314564Sdim const DebugLoc &DL, 65314564Sdim int *BytesAdded = nullptr) const override; 66296417Sdim bool 67314564Sdim reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; 68360784Sdim 69360784Sdim ArrayRef<std::pair<int, const char *>> 70360784Sdim getSerializableTargetIndices() const override; 71285163Sdim}; 72285163Sdim 73285163Sdim} // end namespace llvm 74285163Sdim 75285163Sdim#endif 76