/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCMachineScheduler.cpp | 19 bool PPCPreRASchedStrategy::biasAddiLoadCandidate(SchedCandidate &Cand, argument 29 SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand; 30 SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand; 45 void PPCPreRASchedStrategy::tryCandidate(SchedCandidate &Cand, argument 48 GenericScheduler::tryCandidate(Cand, TryCand, Zone); 50 if (!Cand.isValid() || !Zone) 60 if (biasAddiLoadCandidate(Cand, TryCand, *Zone))
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H A D | PPCMachineScheduler.h | 26 void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, 29 bool biasAddiLoadCandidate(SchedCandidate &Cand,
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H A D | PPCBranchCoalescing.cpp | 155 bool canCoalesceBranch(CoalescingCandidateInfo &Cand); 231 ///\param[in,out] Cand The coalescing candidate to analyze 234 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) { argument 236 << Cand.BranchBlock->getNumber() << " can be coalesced:"); 239 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB, 240 Cand.Cond)) { 245 for (auto &I : Cand.BranchBlock->terminators()) { 270 if (Cand.BranchBlock->isEHPad() || Cand [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | GCNSchedStrategy.cpp | 62 void GCNMaxOccupancySchedStrategy::initCandidate(SchedCandidate &Cand, SUnit *SU, argument 68 Cand.SU = SU; 69 Cand.AtTop = AtTop; 112 Cand.RPDelta.Excess = PressureChange(SRI->getVGPRPressureSet()); 113 Cand.RPDelta.Excess.setUnitInc(NewVGPRPressure - VGPRExcessLimit); 117 Cand.RPDelta.Excess = PressureChange(SRI->getSGPRPressureSet()); 118 Cand.RPDelta.Excess.setUnitInc(NewSGPRPressure - SGPRExcessLimit); 131 Cand.RPDelta.CriticalMax = PressureChange(SRI->getSGPRPressureSet()); 132 Cand.RPDelta.CriticalMax.setUnitInc(SGPRDelta); 134 Cand 142 pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Cand) argument 234 SchedCandidate Cand; local [all...] |
H A D | SIMachineScheduler.cpp | 161 SISchedulerCandidate &Cand, 168 if (Cand.Reason > Reason) 169 Cand.Reason = Reason; 172 Cand.setRepeat(Reason); 178 SISchedulerCandidate &Cand, 185 if (Cand.Reason > Reason) 186 Cand.Reason = Reason; 189 Cand.setRepeat(Reason); 203 void SIScheduleBlock::traceCandidate(const SISchedCandidate &Cand) { argument 205 dbgs() << " SU(" << Cand 159 tryLess(int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason) argument 176 tryGreater(int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason) argument 210 tryCandidateTopDown(SISchedCandidate &Cand, SISchedCandidate &TryCand) argument 1560 tryCandidateLatency(SIBlockSchedCandidate &Cand, SIBlockSchedCandidate &TryCand) argument 1585 tryCandidateRegUsage(SIBlockSchedCandidate &Cand, SIBlockSchedCandidate &TryCand) argument 1608 SIBlockSchedCandidate Cand; local [all...] |
H A D | GCNSchedStrategy.h | 36 SchedCandidate &Cand); 38 void initCandidate(SchedCandidate &Cand, SUnit *SU,
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H A D | SIMachineScheduler.h | 205 void tryCandidateTopDown(SISchedCandidate &Cand, SISchedCandidate &TryCand); 206 void tryCandidateBottomUp(SISchedCandidate &Cand, SISchedCandidate &TryCand); 208 void traceCandidate(const SISchedCandidate &Cand); 389 bool tryCandidateLatency(SIBlockSchedCandidate &Cand, 391 bool tryCandidateRegUsage(SIBlockSchedCandidate &Cand,
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H A D | GCNMinRegStrategy.cpp | 129 auto &Cand = *I++; local 130 RQ.remove(Cand); 131 RQ.push_front(Cand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LoopLoadElimination.cpp | 135 const StoreToLoadForwardingCandidate &Cand) { 136 OS << *Cand.Store << " -->\n"; 137 OS.indent(2) << *Cand.Load << "\n"; 266 for (const auto &Cand : Candidates) { 271 LoadToSingleCand.insert(std::make_pair(Cand.Load, &Cand)); 281 if (Cand.Store->getParent() == OtherCand->Store->getParent() && 282 Cand.isDependenceDistanceOfOne(PSE, L) && 285 if (getInstrIndex(OtherCand->Store) < getInstrIndex(Cand.Store)) 286 OtherCand = &Cand; 134 operator <<(raw_ostream &OS, const StoreToLoadForwardingCandidate &Cand) argument [all...] |
H A D | GVNSink.cpp | 751 SinkingInstructionCandidate Cand; 752 Cand.NumInstructions = ++InstNum; 753 Cand.NumMemoryInsts = MemoryInstNum; 754 Cand.NumBlocks = ActivePreds.size(); 755 Cand.NumPHIs = NeededPHIs.size(); 757 Cand.Blocks.push_back(C); 759 return Cand; 795 auto Cand = analyzeInstructionForSinking(LRI, InstNum, MemoryInstNum, 797 if (!Cand) 799 Cand [all...] |
H A D | ConstantHoisting.cpp | 375 ConstPtrUnionType Cand = ConstInt; local 376 std::tie(Itr, Inserted) = ConstCandMap.insert(std::make_pair(Cand, 0)); 423 ConstPtrUnionType Cand = ConstExpr; local 424 std::tie(Itr, Inserted) = ConstCandMap.insert(std::make_pair(Cand, 0));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegAllocGreedy.cpp | 452 bool growRegion(GlobalSplitCandidate &Cand); 453 bool splitCanCauseEvictionChain(unsigned Evictee, GlobalSplitCandidate &Cand, 457 GlobalSplitCandidate &Cand, unsigned BBNumber, 1312 bool RAGreedy::growRegion(GlobalSplitCandidate &Cand) { argument 1315 SmallVectorImpl<unsigned> &ActiveBlocks = Cand.ActiveBlocks; 1348 if (Cand.PhysReg) { 1349 if (!addThroughConstraints(Cand.Intf, NewBlocks)) 1371 bool RAGreedy::calcCompactRegion(GlobalSplitCandidate &Cand) { argument 1377 Cand.reset(IntfCache, 0); 1383 SpillPlacer->prepare(Cand 1483 splitCanCauseEvictionChain(unsigned Evictee, GlobalSplitCandidate &Cand, unsigned BBNumber, const AllocationOrder &Order) argument 1543 splitCanCauseLocalSpill(unsigned VirtRegToSplit, GlobalSplitCandidate &Cand, unsigned BBNumber, const AllocationOrder &Order) argument 1583 calcGlobalSplitCost(GlobalSplitCandidate &Cand, const AllocationOrder &Order, bool *CanCauseEvictionChain) argument 1702 GlobalSplitCandidate &Cand = GlobalCand[CandIn]; local 1711 GlobalSplitCandidate &Cand = GlobalCand[CandOut]; local 1751 GlobalSplitCandidate &Cand = GlobalCand[CandIn]; local 1759 GlobalSplitCandidate &Cand = GlobalCand[CandOut]; local 1905 GlobalSplitCandidate &Cand = GlobalCand[NumCands]; local 1985 GlobalSplitCandidate &Cand = GlobalCand[BestCand]; local 1997 GlobalSplitCandidate &Cand = GlobalCand.front(); local [all...] |
H A D | MachineScheduler.cpp | 2594 void GenericSchedulerBase::traceCandidate(const SchedCandidate &Cand) { argument 2598 switch (Cand.Reason) { 2602 P = Cand.RPDelta.Excess; 2605 P = Cand.RPDelta.CriticalMax; 2608 P = Cand.RPDelta.CurrentMax; 2611 ResIdx = Cand.Policy.ReduceResIdx; 2614 ResIdx = Cand.Policy.DemandResIdx; 2617 Latency = Cand.SU->getDepth(); 2620 Latency = Cand.SU->getHeight(); 2623 Latency = Cand 2649 tryLess(int TryVal, int CandVal, GenericSchedulerBase::SchedCandidate &TryCand, GenericSchedulerBase::SchedCandidate &Cand, GenericSchedulerBase::CandReason Reason) argument 2665 tryGreater(int TryVal, int CandVal, GenericSchedulerBase::SchedCandidate &TryCand, GenericSchedulerBase::SchedCandidate &Cand, GenericSchedulerBase::CandReason Reason) argument 2681 tryLatency(GenericSchedulerBase::SchedCandidate &TryCand, GenericSchedulerBase::SchedCandidate &Cand, SchedBoundary &Zone) argument 2712 tracePick(const GenericSchedulerBase::SchedCandidate &Cand) argument 2863 tryPressure(const PressureChange &TryP, const PressureChange &CandP, GenericSchedulerBase::SchedCandidate &TryCand, GenericSchedulerBase::SchedCandidate &Cand, GenericSchedulerBase::CandReason Reason, const TargetRegisterInfo *TRI, const MachineFunction &MF) argument 2950 initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, const RegPressureTracker &RPTracker, RegPressureTracker &TempTracker) argument 2997 tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, SchedBoundary *Zone) const argument 3105 pickNodeFromQueue(SchedBoundary &Zone, const CandPolicy &ZonePolicy, const RegPressureTracker &RPTracker, SchedCandidate &Cand) argument 3196 SchedCandidate Cand = BotCand; local 3363 tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand) argument 3401 pickNodeFromQueue(SchedCandidate &Cand) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineScheduler.h | 905 void traceCandidate(const SchedCandidate &Cand); 916 GenericSchedulerBase::SchedCandidate &Cand, 920 GenericSchedulerBase::SchedCandidate &Cand, 923 GenericSchedulerBase::SchedCandidate &Cand, 928 GenericSchedulerBase::SchedCandidate &Cand, 997 void initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop, 1001 virtual void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, 1064 void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand); 1066 void pickNodeFromQueue(SchedCandidate &Cand);
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/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaOverload.cpp | 1378 for (OverloadCandidateSet::iterator Cand = Conversions.begin(); 1379 Cand != Conversions.end(); ++Cand) 1380 if (Cand->Best) 1381 ICS.Ambiguous.addConversion(Cand->FoundDecl, Cand->Function); 4629 for (OverloadCandidateSet::iterator Cand = CandidateSet.begin(); 4630 Cand != CandidateSet.end(); ++Cand) 4631 if (Cand [all...] |
H A D | SemaLookup.cpp | 3245 DeclAccessPair Cand = DeclAccessPair::make(CandDecl, AS_public); 3246 auto CtorInfo = getConstructorInfo(Cand); 3247 if (CXXMethodDecl *M = dyn_cast<CXXMethodDecl>(Cand->getUnderlyingDecl())) { 3249 AddMethodCandidate(M, Cand, RD, ThisTy, Classification, 3256 AddOverloadCandidate(M, Cand, llvm::makeArrayRef(&Arg, NumArgs), OCS, 3259 dyn_cast<FunctionTemplateDecl>(Cand->getUnderlyingDecl())) { 3262 Tmpl, Cand, RD, nullptr, ThisTy, Classification, 3270 Tmpl, Cand, nullptr, llvm::makeArrayRef(&Arg, NumArgs), OCS, true); 3272 assert(isa<UsingDecl>(Cand.getDecl()) &&
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/ProfileData/ |
H A D | SampleProf.h | 509 StringRef Cand(F.getName()); 512 auto It = Cand.rfind(Suffix); 514 return Cand; 515 auto Dit = Cand.rfind('.'); 517 Cand = Cand.substr(0, It); 519 return Cand;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
H A D | InstrProfiling.cpp | 266 for (auto &Cand : LoopToCandidates[&L]) { 270 Value *InitVal = ConstantInt::get(Cand.first->getType(), 0); 274 auto *BB = Cand.first->getParent(); 286 PGOCounterPromoterHelper Promoter(Cand.first, Cand.second, SSA, InitVal, 289 Promoter.run(SmallVector<Instruction *, 2>({Cand.first, Cand.second}));
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H A D | PGOInstrumentation.cpp | 848 for (VPCandidateInfo Cand : FuncInfo.ValueSites[Kind]) { 852 IRBuilder<> Builder(Cand.InsertPt); 853 assert(Builder.GetInsertPoint() != Cand.InsertPt->getParent()->end() && 857 if (Cand.V->getType()->isIntegerTy()) 858 ToProfile = Builder.CreateZExtOrTrunc(Cand.V, Builder.getInt64Ty()); 859 else if (Cand.V->getType()->isPointerTy()) 860 ToProfile = Builder.CreatePtrToInt(Cand.V, Builder.getInt64Ty());
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
H A D | PartialInlining.cpp | 677 BasicBlock *Cand = OutliningInfo->NonReturnBlock; local 678 if (succ_size(Cand) != 2) 681 if (HasNonEntryPred(Cand)) 684 BasicBlock *Succ1 = *succ_begin(Cand); 685 BasicBlock *Succ2 = *(succ_begin(Cand) + 1); 692 if (NonReturnBlock->getSinglePredecessor() != Cand) 696 OutliningInfo->Entries.push_back(Cand); 698 OutliningInfo->ReturnBlockPreds.push_back(Cand); 699 Entries.insert(Cand);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 185 MachineInstr *MergeOpsUpdate(const MergeCandidate &Cand); 856 MachineInstr *ARMLoadStoreOpt::MergeOpsUpdate(const MergeCandidate &Cand) { argument 857 const MachineInstr *First = Cand.Instrs.front(); 865 for (const MachineInstr *MI : Cand.Instrs) { 897 MachineInstr *LatestMI = Cand.Instrs[Cand.LatestMIIdx]; 907 if (Cand.CanMergeToLSDouble) 910 Cand.Instrs); 911 if (!Merged && Cand.CanMergeToLSMulti) 913 Opcode, Pred, PredReg, DL, Regs, Cand [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 483 CodeGenRegister *Cand = const_cast<CodeGenRegister*>(Leads[i]); local 485 if (Cand == this || getSubRegIndex(Cand)) 487 // Check if each component of Cand is already a sub-register. 488 assert(!Cand->ExplicitSubRegs.empty() && 490 if (Cand->ExplicitSubRegs.size() == 1) 495 assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct"); 497 for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) { 510 // There is nothing to do if some Cand sub-register is not part of this 515 // Each part of Cand i [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitSimplify.cpp | 3324 std::vector<LoopCand> Cand; 3351 Cand.push_back(LoopCand(&B, PB, EB)); 3355 for (auto &C : Cand)
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