Searched refs:AR934X_SRIF_DDR_DPLL1_REG (Results 1 - 2 of 2) sorted by relevance
| /freebsd-11-stable/sys/mips/atheros/ | ||
| H A D | ar934xreg.h | 220 #define AR934X_SRIF_DDR_DPLL1_REG (AR934X_SRIF_BASE + 0x240) macro |
| H A D | ar934x_chip.c | 134 pll = ATH_READ_REG(AR934X_SRIF_DDR_DPLL1_REG); |
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