/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZCallingConv.cpp | 1 //===-- SystemZCallingConv.cpp - Calling conventions for SystemZ ----------===// 15 const unsigned SystemZ::ArgGPRs[SystemZ::NumArgGPRs] = { 16 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D 19 const unsigned SystemZ::ArgFPRs[SystemZ [all...] |
H A D | SystemZInstrInfo.cpp | 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===// 10 // This file contains the SystemZ implementation of the TargetInstrInfo class. 34 if (SystemZ::GRH32BitRegClass.contains(Reg)) 36 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32"); 44 : SystemZGenInstrInfo(SystemZ::ADJCALLSTACKDOWN, SystemZ::ADJCALLSTACKUP), 63 HighRegOp.setReg(RI.getSubReg(HighRegOp.getReg(), SystemZ::subreg_h64)); 64 LowRegOp.setReg(RI.getSubReg(LowRegOp.getReg(), SystemZ::subreg_l64)); 91 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset); 128 DestReg, SrcReg, SystemZ [all...] |
H A D | SystemZRegisterInfo.cpp | 1 //===-- SystemZRegisterInfo.cpp - SystemZ register information ------------===// 21 : SystemZGenRegisterInfo(SystemZ::R14D), TM(tm) {} 26 SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D, 27 SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ [all...] |
H A D | SystemZCallingConv.h | 1 //===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===// 14 namespace SystemZ { namespace in namespace:llvm
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H A D | SystemZISelLowering.cpp | 1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===// 70 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass); 72 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass); 73 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass); 74 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass); 75 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass); 76 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass); 82 setExceptionPointerRegister(SystemZ::R6D); 83 setExceptionSelectorRegister(SystemZ::R7D); 84 setStackPointerRegisterToSaveRestore(SystemZ [all...] |
H A D | SystemZAsmPrinter.cpp | 1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===// 10 // Streams SystemZ assembly language and associated data, in the form of 73 case SystemZ::Return: 74 LoweredMI = MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D); 77 case SystemZ::CallBRASL: 78 LoweredMI = MCInstBuilder(SystemZ::BRASL) 79 .addReg(SystemZ::R14D) 83 case SystemZ::CallBASR: 84 LoweredMI = MCInstBuilder(SystemZ [all...] |
H A D | SystemZLongBranch.cpp | 1 //===-- SystemZLongBranch.cpp - Branch lengthening for SystemZ ------------===// 35 // On SystemZ, long branches are only needed for functions bigger than 64k, 137 return "SystemZ Long Branch"; 214 case SystemZ::J: 218 case SystemZ::BRC: 222 case SystemZ::BRCT: 223 case SystemZ::BRCTG: 227 case SystemZ::CRJ: 228 case SystemZ::CLRJ: 232 case SystemZ [all...] |
H A D | SystemZFrameLowering.cpp | 1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===// 26 { SystemZ::R2D, 0x10 }, 27 { SystemZ::R3D, 0x18 }, 28 { SystemZ::R4D, 0x20 }, 29 { SystemZ::R5D, 0x28 }, 30 { SystemZ::R6D, 0x30 }, 31 { SystemZ::R7D, 0x38 }, 32 { SystemZ::R8D, 0x40 }, 33 { SystemZ::R9D, 0x48 }, 34 { SystemZ [all...] |
H A D | SystemZShortenInst.cpp | 30 return "SystemZ Instruction Shortening"; 44 unsigned LowGPRs[SystemZ::NUM_TARGET_REGS]; 45 unsigned HighGPRs[SystemZ::NUM_TARGET_REGS]; 79 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number"); 86 if (SystemZ::isImmLL(Imm)) { 91 if (SystemZ::isImmLH(Imm)) { 112 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number"); 123 if (Opcode == SystemZ::IILF) 124 Changed |= shortenIIF(MI, LowGPRs, LiveHigh, SystemZ::LLILL, 125 SystemZ [all...] |
H A D | SystemZElimCompare.cpp | 70 return "SystemZ Comparison Elimination"; 103 if ((*SI)->isLiveIn(SystemZ::CC)) 119 case SystemZ::LR: 120 case SystemZ::LGR: 121 case SystemZ::LGFR: 122 case SystemZ::LTR: 123 case SystemZ::LTGR: 124 case SystemZ::LTGFR: 125 case SystemZ::LER: 126 case SystemZ [all...] |
H A D | SystemZRegisterInfo.h | 1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===// 13 #include "SystemZ.h" 21 namespace SystemZ { namespace in namespace:llvm
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H A D | SystemZISelDAGToDAG.cpp | 1 //===-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ --===// 10 // This file defines an instruction selector for the SystemZ target. 322 return "SystemZ DAG->DAG Pattern Instruction Selection"; 704 if (RxSBG.Opcode == SystemZ::RNSBG) 729 if (RxSBG.Opcode != SystemZ::RNSBG) 791 if (RxSBG.Opcode == SystemZ::RNSBG) { 819 if (RxSBG.Opcode == SystemZ::RNSBG || Opcode == ISD::SRA) { 847 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32, 850 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N); 857 RxSBGOperands RISBG(SystemZ [all...] |
H A D | SystemZ.h | 1 //==- SystemZ.h - Top-Level Interface for SystemZ representation -*- C++ -*-==// 11 // the LLVM SystemZ backend. 25 namespace SystemZ { namespace in namespace:llvm
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H A D | SystemZSelectionDAGInfo.cpp | 1 //===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===// 186 DAG.getConstant(SystemZ::IPM_CC, MVT::i32)); 229 Ops.push_back(DAG.getConstant(SystemZ::CCMASK_SRST, MVT::i32)); 230 Ops.push_back(DAG.getConstant(SystemZ::CCMASK_SRST_FOUND, MVT::i32));
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/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.cpp | 1 //===-- SystemZMCTargetDesc.cpp - SystemZ target descriptions -------------===// 31 SystemZ::R0L, SystemZ::R1L, SystemZ::R2L, SystemZ::R3L, 32 SystemZ::R4L, SystemZ::R5L, SystemZ::R6L, SystemZ::R7L, 33 SystemZ [all...] |
H A D | SystemZMCFixups.h | 1 //===-- SystemZMCFixups.h - SystemZ-specific fixup entries ------*- C++ -*-===// 16 namespace SystemZ { namespace in namespace:llvm
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H A D | SystemZMCObjectWriter.cpp | 1 //===-- SystemZMCObjectWriter.cpp - SystemZ ELF writer --------------------===// 62 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PC16DBL; 63 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PC32DBL; 64 case SystemZ::FK_390_PLT16DBL: return ELF::R_390_PLT16DBL; 65 case SystemZ::FK_390_PLT32DBL: return ELF::R_390_PLT32DBL; 82 case SystemZ::FK_390_PC16DBL: return ELF::R_390_PLT16DBL; 83 case SystemZ::FK_390_PC32DBL: return ELF::R_390_PLT32DBL; 108 if (IsPCRel && Kind == SystemZ::FK_390_PC32DBL)
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H A D | SystemZMCAsmBackend.cpp | 1 //===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===// 28 case SystemZ::FK_390_PC16DBL: 29 case SystemZ::FK_390_PC32DBL: 30 case SystemZ::FK_390_PLT16DBL: 31 case SystemZ::FK_390_PLT32DBL: 47 return SystemZ::NumTargetFixupKinds; 65 llvm_unreachable("SystemZ does do not have assembler relaxation"); 82 const static MCFixupKindInfo Infos[SystemZ::NumTargetFixupKinds] = {
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H A D | SystemZMCCodeEmitter.cpp | 1 //===-- SystemZMCCodeEmitter.cpp - Convert SystemZ code to machine code ---===// 76 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC16DBL, 2); 80 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC32DBL, 2);
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