Lines Matching refs:SystemZ
1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===//
70 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
72 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
73 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
74 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass);
75 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass);
76 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass);
82 setExceptionPointerRegister(SystemZ::R6D);
83 setExceptionSelectorRegister(SystemZ::R7D);
84 setStackPointerRegisterToSaveRestore(SystemZ::R15D);
88 // such as SystemZ has with CC, so set this to the register-pressure
263 // VASTART and VACOPY need to deal with the SystemZ-specific varargs
476 return std::make_pair(0U, &SystemZ::GR64BitRegClass);
478 return std::make_pair(0U, &SystemZ::GR128BitRegClass);
479 return std::make_pair(0U, &SystemZ::GR32BitRegClass);
483 return std::make_pair(0U, &SystemZ::ADDR64BitRegClass);
485 return std::make_pair(0U, &SystemZ::ADDR128BitRegClass);
486 return std::make_pair(0U, &SystemZ::ADDR32BitRegClass);
489 return std::make_pair(0U, &SystemZ::GRH32BitRegClass);
493 return std::make_pair(0U, &SystemZ::FP64BitRegClass);
495 return std::make_pair(0U, &SystemZ::FP128BitRegClass);
496 return std::make_pair(0U, &SystemZ::FP32BitRegClass);
506 return parseRegisterNumber(Constraint, &SystemZ::GR32BitRegClass,
509 return parseRegisterNumber(Constraint, &SystemZ::GR128BitRegClass,
511 return parseRegisterNumber(Constraint, &SystemZ::GR64BitRegClass,
516 return parseRegisterNumber(Constraint, &SystemZ::FP32BitRegClass,
519 return parseRegisterNumber(Constraint, &SystemZ::FP128BitRegClass,
521 return parseRegisterNumber(Constraint, &SystemZ::FP64BitRegClass,
668 RC = &SystemZ::GR32BitRegClass;
672 RC = &SystemZ::GR64BitRegClass;
676 RC = &SystemZ::FP32BitRegClass;
680 RC = &SystemZ::FP64BitRegClass;
729 if (NumFixedFPRs < SystemZ::NumArgFPRs) {
730 SDValue MemOps[SystemZ::NumArgFPRs];
731 for (unsigned I = NumFixedFPRs; I < SystemZ::NumArgFPRs; ++I) {
732 unsigned Offset = TFL->getRegSpillOffset(SystemZ::ArgFPRs[I]);
735 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
736 &SystemZ::FP64BitRegClass);
746 SystemZ::NumArgFPRs - NumFixedFPRs);
764 if (Reg == SystemZ::R6H || Reg == SystemZ::R6L || Reg == SystemZ::R6D)
832 StackPtr = DAG.getCopyFromReg(Chain, DL, SystemZ::R15D, PtrVT);
862 Chain = DAG.getCopyToReg(Chain, DL, SystemZ::R1D, Callee, Glue);
864 Callee = DAG.getRegister(SystemZ::R1D, Callee.getValueType());
980 case ISD::SET##X: return SystemZ::CCMASK_CMP_##X; \
981 case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \
982 case ISD::SETU##X: return SystemZ::CCMASK_CMP_UO | SystemZ::CCMASK_CMP_##X
995 case ISD::SETO: return SystemZ::CCMASK_CMP_O;
996 case ISD::SETUO: return SystemZ::CCMASK_CMP_UO;
1007 if (CCMask == (CCValid & (SystemZ::CCMASK_1 | SystemZ::CCMASK_3)))
1008 return IPMConversion(0, 0, SystemZ::IPM_CC);
1009 if (CCMask == (CCValid & (SystemZ::CCMASK_2 | SystemZ::CCMASK_3)))
1010 return IPMConversion(0, 0, SystemZ::IPM_CC + 1);
1020 if (CCMask == (CCValid & SystemZ::CCMASK_0))
1021 return IPMConversion(0, -(1 << SystemZ::IPM_CC), 31);
1022 if (CCMask == (CCValid & (SystemZ::CCMASK_0 | SystemZ::CCMASK_1)))
1023 return IPMConversion(0, -(2 << SystemZ::IPM_CC), 31);
1024 if (CCMask == (CCValid & (SystemZ::CCMASK_0
1025 | SystemZ::CCMASK_1
1026 | SystemZ::CCMASK_2)))
1027 return IPMConversion(0, -(3 << SystemZ::IPM_CC), 31);
1028 if (CCMask == (CCValid & SystemZ::CCMASK_3))
1029 return IPMConversion(0, TopBit - (3 << SystemZ::IPM_CC), 31);
1030 if (CCMask == (CCValid & (SystemZ::CCMASK_1
1031 | SystemZ::CCMASK_2
1032 | SystemZ::CCMASK_3)))
1033 return IPMConversion(0, TopBit - (1 << SystemZ::IPM_CC), 31);
1037 if (CCMask == (CCValid & (SystemZ::CCMASK_0 | SystemZ::CCMASK_2)))
1038 return IPMConversion(-1, 0, SystemZ::IPM_CC);
1042 if (CCMask == (CCValid & (SystemZ::CCMASK_1 | SystemZ::CCMASK_2)))
1043 return IPMConversion(0, 1 << SystemZ::IPM_CC, SystemZ::IPM_CC + 1);
1044 if (CCMask == (CCValid & (SystemZ::CCMASK_0 | SystemZ::CCMASK_3)))
1045 return IPMConversion(0, -(1 << SystemZ::IPM_CC), SystemZ::IPM_CC + 1);
1050 if (CCMask == (CCValid & SystemZ::CCMASK_1))
1051 return IPMConversion(1 << SystemZ::IPM_CC, -(1 << SystemZ::IPM_CC), 31);
1052 if (CCMask == (CCValid & SystemZ::CCMASK_2))
1053 return IPMConversion(1 << SystemZ::IPM_CC,
1054 TopBit - (3 << SystemZ::IPM_CC), 31);
1055 if (CCMask == (CCValid & (SystemZ::CCMASK_0
1056 | SystemZ::CCMASK_1
1057 | SystemZ::CCMASK_3)))
1058 return IPMConversion(1 << SystemZ::IPM_CC, -(3 << SystemZ::IPM_CC), 31);
1059 if (CCMask == (CCValid & (SystemZ::CCMASK_0
1060 | SystemZ::CCMASK_2
1061 | SystemZ::CCMASK_3)))
1062 return IPMConversion(1 << SystemZ::IPM_CC,
1063 TopBit - (1 << SystemZ::IPM_CC), 31);
1082 if ((Value == -1 && CCMask == SystemZ::CCMASK_CMP_GT) ||
1083 (Value == -1 && CCMask == SystemZ::CCMASK_CMP_LE) ||
1084 (Value == 1 && CCMask == SystemZ::CCMASK_CMP_LT) ||
1085 (Value == 1 && CCMask == SystemZ::CCMASK_CMP_GE)) {
1086 CCMask ^= SystemZ::CCMASK_CMP_EQ;
1122 else if (CCMask == SystemZ::CCMASK_CMP_EQ ||
1123 CCMask == SystemZ::CCMASK_CMP_NE)
1132 if (Value == 0 && CCMask == SystemZ::CCMASK_CMP_LT)
1134 Value = 127, CCMask = SystemZ::CCMASK_CMP_GT, IsUnsigned = true;
1135 else if (Value == 0 && CCMask == SystemZ::CCMASK_CMP_GE)
1137 Value = 128, CCMask = SystemZ::CCMASK_CMP_LT, IsUnsigned = true;
1260 if (!SystemZ::isImmLL(Mask) && !SystemZ::isImmLH(Mask) &&
1261 !SystemZ::isImmHL(Mask) && !SystemZ::isImmHH(Mask))
1275 if (CCMask == SystemZ::CCMASK_CMP_EQ)
1276 return SystemZ::CCMASK_TM_ALL_0;
1277 if (CCMask == SystemZ::CCMASK_CMP_NE)
1278 return SystemZ::CCMASK_TM_SOME_1;
1281 if (CCMask == SystemZ::CCMASK_CMP_LT)
1282 return SystemZ::CCMASK_TM_ALL_0;
1283 if (CCMask == SystemZ::CCMASK_CMP_GE)
1284 return SystemZ::CCMASK_TM_SOME_1;
1287 if (CCMask == SystemZ::CCMASK_CMP_LE)
1288 return SystemZ::CCMASK_TM_ALL_0;
1289 if (CCMask == SystemZ::CCMASK_CMP_GT)
1290 return SystemZ::CCMASK_TM_SOME_1;
1295 if (CCMask == SystemZ::CCMASK_CMP_EQ)
1296 return SystemZ::CCMASK_TM_ALL_1;
1297 if (CCMask == SystemZ::CCMASK_CMP_NE)
1298 return SystemZ::CCMASK_TM_SOME_0;
1301 if (CCMask == SystemZ::CCMASK_CMP_GT)
1302 return SystemZ::CCMASK_TM_ALL_1;
1303 if (CCMask == SystemZ::CCMASK_CMP_LE)
1304 return SystemZ::CCMASK_TM_SOME_0;
1307 if (CCMask == SystemZ::CCMASK_CMP_GE)
1308 return SystemZ::CCMASK_TM_ALL_1;
1309 if (CCMask == SystemZ::CCMASK_CMP_LT)
1310 return SystemZ::CCMASK_TM_SOME_0;
1315 if (CCMask == SystemZ::CCMASK_CMP_LE)
1316 return SystemZ::CCMASK_TM_MSB_0;
1317 if (CCMask == SystemZ::CCMASK_CMP_GT)
1318 return SystemZ::CCMASK_TM_MSB_1;
1321 if (CCMask == SystemZ::CCMASK_CMP_LT)
1322 return SystemZ::CCMASK_TM_MSB_0;
1323 if (CCMask == SystemZ::CCMASK_CMP_GE)
1324 return SystemZ::CCMASK_TM_MSB_1;
1330 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == Low)
1331 return SystemZ::CCMASK_TM_MIXED_MSB_0;
1332 if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == Low)
1333 return SystemZ::CCMASK_TM_MIXED_MSB_0 ^ SystemZ::CCMASK_ANY;
1334 if (CCMask == SystemZ::CCMASK_CMP_EQ && CmpVal == High)
1335 return SystemZ::CCMASK_TM_MIXED_MSB_1;
1336 if (CCMask == SystemZ::CCMASK_CMP_NE && CmpVal == High)
1337 return SystemZ::CCMASK_TM_MIXED_MSB_1 ^ SystemZ::CCMASK_ANY;
1400 ICmpType = (bool(NewCCMask & SystemZ::CCMASK_TM_MIXED_MSB_0) !=
1401 bool(NewCCMask & SystemZ::CCMASK_TM_MIXED_MSB_1));
1402 CCValid = SystemZ::CCMASK_TM;
1418 CCValid = SystemZ::CCMASK_FCMP;
1421 IsUnsigned = CCMask & SystemZ::CCMASK_CMP_UO;
1422 CCValid = SystemZ::CCMASK_ICMP;
1432 if (CCMask == SystemZ::CCMASK_CMP_EQ ||
1433 CCMask == SystemZ::CCMASK_CMP_NE ||
1444 CCMask = ((CCMask & SystemZ::CCMASK_CMP_EQ) |
1445 (CCMask & SystemZ::CCMASK_CMP_GT ? SystemZ::CCMASK_CMP_LT : 0) |
1446 (CCMask & SystemZ::CCMASK_CMP_LT ? SystemZ::CCMASK_CMP_GT : 0) |
1447 (CCMask & SystemZ::CCMASK_CMP_UO));
1485 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result);
1486 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result);
1686 In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL,
1694 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32,
1699 SDValue In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL,
1703 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL,
1822 lowerGR128Binary(DAG, DL, VT, SystemZ::AEXT128_64, SystemZISD::UMUL_LOHI64,
1846 lowerGR128Binary(DAG, DL, VT, SystemZ::AEXT128_64, SystemZISD::UMUL_LOHI64,
1873 lowerGR128Binary(DAG, DL, VT, SystemZ::AEXT128_64, Opcode,
1888 lowerGR128Binary(DAG, DL, VT, SystemZ::ZEXT128_32, SystemZISD::UDIVREM32,
1891 lowerGR128Binary(DAG, DL, VT, SystemZ::ZEXT128_64, SystemZISD::UDIVREM64,
1948 return DAG.getTargetInsertSubreg(SystemZ::subreg_l32, DL,
2077 SystemZ::R15D, Op.getValueType());
2085 SystemZ::R15D, Op.getOperand(1));
2096 unsigned Code = IsWrite ? SystemZ::PFD_WRITE : SystemZ::PFD_READ;
2274 unsigned Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
2275 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LA), Reg)
2301 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2315 BuildMI(*MBB, MI, DL, TII->get(SystemZ::PHI), DestReg)
2369 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2418 &SystemZ::GR32BitRegClass :
2419 &SystemZ::GR64BitRegClass);
2420 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
2421 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
2459 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
2463 BuildMI(MBB, DL, TII->get(SystemZ::RLL), RotatedOldVal)
2472 BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
2476 BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
2482 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp);
2483 BuildMI(MBB, DL, TII->get(SystemZ::AGHI), RotatedNewVal)
2493 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RotatedNewVal)
2497 BuildMI(MBB, DL, TII->get(SystemZ::RLL), NewVal)
2501 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2502 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
2540 &SystemZ::GR32BitRegClass :
2541 &SystemZ::GR64BitRegClass);
2542 unsigned LOpcode = BitSize <= 32 ? SystemZ::L : SystemZ::LG;
2543 unsigned CSOpcode = BitSize <= 32 ? SystemZ::CS : SystemZ::CSG;
2580 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
2584 BuildMI(MBB, DL, TII->get(SystemZ::RLL), RotatedOldVal)
2588 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2589 .addImm(SystemZ::CCMASK_ICMP).addImm(KeepOldMask).addMBB(UpdateMBB);
2598 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RotatedAltVal)
2611 BuildMI(MBB, DL, TII->get(SystemZ::PHI), RotatedNewVal)
2615 BuildMI(MBB, DL, TII->get(SystemZ::RLL), NewVal)
2619 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2620 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
2648 const TargetRegisterClass *RC = &SystemZ::GR32BitRegClass;
2651 unsigned LOpcode = TII->getOpcodeForOffset(SystemZ::L, Disp);
2652 unsigned CSOpcode = TII->getOpcodeForOffset(SystemZ::CS, Disp);
2695 BuildMI(MBB, DL, TII->get(SystemZ::PHI), OldVal)
2698 BuildMI(MBB, DL, TII->get(SystemZ::PHI), CmpVal)
2701 BuildMI(MBB, DL, TII->get(SystemZ::PHI), SwapVal)
2704 BuildMI(MBB, DL, TII->get(SystemZ::RLL), Dest)
2706 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RetryCmpVal)
2708 BuildMI(MBB, DL, TII->get(SystemZ::CR))
2710 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2711 .addImm(SystemZ::CCMASK_ICMP)
2712 .addImm(SystemZ::CCMASK_CMP_NE).addMBB(DoneMBB);
2726 BuildMI(MBB, DL, TII->get(SystemZ::RISBG32), RetrySwapVal)
2728 BuildMI(MBB, DL, TII->get(SystemZ::RLL), StoreVal)
2732 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2733 .addImm(SystemZ::CCMASK_CS).addImm(SystemZ::CCMASK_CS_NE).addMBB(LoopMBB);
2756 unsigned In128 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
2760 unsigned NewIn128 = MRI.createVirtualRegister(&SystemZ::GR128BitRegClass);
2761 unsigned Zero64 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass);
2763 BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64)
2766 .addReg(In128).addReg(Zero64).addImm(SystemZ::subreg_h64);
2793 MachineBasicBlock *EndMBB = (Length > 256 && Opcode == SystemZ::CLC ?
2805 const TargetRegisterClass *RC = &SystemZ::ADDR64BitRegClass;
2813 RC = &SystemZ::GR64BitRegClass;
2840 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisDestReg)
2844 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisSrcReg)
2847 BuildMI(MBB, DL, TII->get(SystemZ::PHI), ThisCountReg)
2850 if (Opcode == SystemZ::MVC)
2851 BuildMI(MBB, DL, TII->get(SystemZ::PFD))
2852 .addImm(SystemZ::PFD_WRITE)
2858 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2859 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
2876 BuildMI(MBB, DL, TII->get(SystemZ::LA), NextDestReg)
2879 BuildMI(MBB, DL, TII->get(SystemZ::LA), NextSrcReg)
2881 BuildMI(MBB, DL, TII->get(SystemZ::AGHI), NextCountReg)
2883 BuildMI(MBB, DL, TII->get(SystemZ::CGHI))
2885 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2886 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
2902 unsigned Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
2903 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LAY), Reg)
2909 unsigned Reg = MRI.createVirtualRegister(&SystemZ::ADDR64BitRegClass);
2910 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(SystemZ::LAY), Reg)
2925 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2926 .addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_NE)
2936 MBB->addLiveIn(SystemZ::CC);
2959 const TargetRegisterClass *RC = &SystemZ::GR64BitRegClass;
2983 BuildMI(MBB, DL, TII->get(SystemZ::PHI), This1Reg)
2986 BuildMI(MBB, DL, TII->get(SystemZ::PHI), This2Reg)
2989 BuildMI(MBB, DL, TII->get(TargetOpcode::COPY), SystemZ::R0L).addReg(CharReg);
2993 BuildMI(MBB, DL, TII->get(SystemZ::BRC))
2994 .addImm(SystemZ::CCMASK_ANY).addImm(SystemZ::CCMASK_3).addMBB(LoopMBB);
2998 DoneMBB->addLiveIn(SystemZ::CC);
3007 case SystemZ::Select32Mux:
3008 case SystemZ::Select32:
3009 case SystemZ::SelectF32:
3010 case SystemZ::Select64:
3011 case SystemZ::SelectF64:
3012 case SystemZ::SelectF128:
3015 case SystemZ::CondStore8Mux:
3016 return emitCondStore(MI, MBB, SystemZ::STCMux, 0, false);
3017 case SystemZ::CondStore8MuxInv:
3018 return emitCondStore(MI, MBB, SystemZ::STCMux, 0, true);
3019 case SystemZ::CondStore16Mux:
3020 return emitCondStore(MI, MBB, SystemZ::STHMux, 0, false);
3021 case SystemZ::CondStore16MuxInv:
3022 return emitCondStore(MI, MBB, SystemZ::STHMux, 0, true);
3023 case SystemZ::CondStore8:
3024 return emitCondStore(MI, MBB, SystemZ::STC, 0, false);
3025 case SystemZ::CondStore8Inv:
3026 return emitCondStore(MI, MBB, SystemZ::STC, 0, true);
3027 case SystemZ::CondStore16:
3028 return emitCondStore(MI, MBB, SystemZ::STH, 0, false);
3029 case SystemZ::CondStore16Inv:
3030 return emitCondStore(MI, MBB, SystemZ::STH, 0, true);
3031 case SystemZ::CondStore32:
3032 return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, false);
3033 case SystemZ::CondStore32Inv:
3034 return emitCondStore(MI, MBB, SystemZ::ST, SystemZ::STOC, true);
3035 case SystemZ::CondStore64:
3036 return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, false);
3037 case SystemZ::CondStore64Inv:
3038 return emitCondStore(MI, MBB, SystemZ::STG, SystemZ::STOCG, true);
3039 case SystemZ::CondStoreF32:
3040 return emitCondStore(MI, MBB, SystemZ::STE, 0, false);
3041 case SystemZ::CondStoreF32Inv:
3042 return emitCondStore(MI, MBB, SystemZ::STE, 0, true);
3043 case SystemZ::CondStoreF64:
3044 return emitCondStore(MI, MBB, SystemZ::STD, 0, false);
3045 case SystemZ::CondStoreF64Inv:
3046 return emitCondStore(MI, MBB, SystemZ::STD, 0, true);
3048 case SystemZ::AEXT128_64:
3049 return emitExt128(MI, MBB, false, SystemZ::subreg_l64);
3050 case SystemZ::ZEXT128_32:
3051 return emitExt128(MI, MBB, true, SystemZ::subreg_l32);
3052 case SystemZ::ZEXT128_64:
3053 return emitExt128(MI, MBB, true, SystemZ::subreg_l64);
3055 case SystemZ::ATOMIC_SWAPW:
3057 case SystemZ::ATOMIC_SWAP_32:
3059 case SystemZ::ATOMIC_SWAP_64:
3062 case SystemZ::ATOMIC_LOADW_AR:
3063 return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 0);
3064 case SystemZ::ATOMIC_LOADW_AFI:
3065 return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 0);
3066 case SystemZ::ATOMIC_LOAD_AR:
3067 return emitAtomicLoadBinary(MI, MBB, SystemZ::AR, 32);
3068 case SystemZ::ATOMIC_LOAD_AHI:
3069 return emitAtomicLoadBinary(MI, MBB, SystemZ::AHI, 32);
3070 case SystemZ::ATOMIC_LOAD_AFI:
3071 return emitAtomicLoadBinary(MI, MBB, SystemZ::AFI, 32);
3072 case SystemZ::ATOMIC_LOAD_AGR:
3073 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGR, 64);
3074 case SystemZ::ATOMIC_LOAD_AGHI:
3075 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGHI, 64);
3076 case SystemZ::ATOMIC_LOAD_AGFI:
3077 return emitAtomicLoadBinary(MI, MBB, SystemZ::AGFI, 64);
3079 case SystemZ::ATOMIC_LOADW_SR:
3080 return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 0);
3081 case SystemZ::ATOMIC_LOAD_SR:
3082 return emitAtomicLoadBinary(MI, MBB, SystemZ::SR, 32);
3083 case SystemZ::ATOMIC_LOAD_SGR:
3084 return emitAtomicLoadBinary(MI, MBB, SystemZ::SGR, 64);
3086 case SystemZ::ATOMIC_LOADW_NR:
3087 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0);
3088 case SystemZ::ATOMIC_LOADW_NILH:
3089 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0);
3090 case SystemZ::ATOMIC_LOAD_NR:
3091 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32);
3092 case SystemZ::ATOMIC_LOAD_NILL:
3093 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32);
3094 case SystemZ::ATOMIC_LOAD_NILH:
3095 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32);
3096 case SystemZ::ATOMIC_LOAD_NILF:
3097 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32);
3098 case SystemZ::ATOMIC_LOAD_NGR:
3099 return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64);
3100 case SystemZ::ATOMIC_LOAD_NILL64:
3101 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64);
3102 case SystemZ::ATOMIC_LOAD_NILH64:
3103 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64);
3104 case SystemZ::ATOMIC_LOAD_NIHL64:
3105 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64);
3106 case SystemZ::ATOMIC_LOAD_NIHH64:
3107 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64);
3108 case SystemZ::ATOMIC_LOAD_NILF64:
3109 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64);
3110 case SystemZ::ATOMIC_LOAD_NIHF64:
3111 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64);
3113 case SystemZ::ATOMIC_LOADW_OR:
3114 return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 0);
3115 case SystemZ::ATOMIC_LOADW_OILH:
3116 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 0);
3117 case SystemZ::ATOMIC_LOAD_OR:
3118 return emitAtomicLoadBinary(MI, MBB, SystemZ::OR, 32);
3119 case SystemZ::ATOMIC_LOAD_OILL:
3120 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL, 32);
3121 case SystemZ::ATOMIC_LOAD_OILH:
3122 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH, 32);
3123 case SystemZ::ATOMIC_LOAD_OILF:
3124 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF, 32);
3125 case SystemZ::ATOMIC_LOAD_OGR:
3126 return emitAtomicLoadBinary(MI, MBB, SystemZ::OGR, 64);
3127 case SystemZ::ATOMIC_LOAD_OILL64:
3128 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILL64, 64);
3129 case SystemZ::ATOMIC_LOAD_OILH64:
3130 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILH64, 64);
3131 case SystemZ::ATOMIC_LOAD_OIHL64:
3132 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHL64, 64);
3133 case SystemZ::ATOMIC_LOAD_OIHH64:
3134 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHH64, 64);
3135 case SystemZ::ATOMIC_LOAD_OILF64:
3136 return emitAtomicLoadBinary(MI, MBB, SystemZ::OILF64, 64);
3137 case SystemZ::ATOMIC_LOAD_OIHF64:
3138 return emitAtomicLoadBinary(MI, MBB, SystemZ::OIHF64, 64);
3140 case SystemZ::ATOMIC_LOADW_XR:
3141 return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 0);
3142 case SystemZ::ATOMIC_LOADW_XILF:
3143 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 0);
3144 case SystemZ::ATOMIC_LOAD_XR:
3145 return emitAtomicLoadBinary(MI, MBB, SystemZ::XR, 32);
3146 case SystemZ::ATOMIC_LOAD_XILF:
3147 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF, 32);
3148 case SystemZ::ATOMIC_LOAD_XGR:
3149 return emitAtomicLoadBinary(MI, MBB, SystemZ::XGR, 64);
3150 case SystemZ::ATOMIC_LOAD_XILF64:
3151 return emitAtomicLoadBinary(MI, MBB, SystemZ::XILF64, 64);
3152 case SystemZ::ATOMIC_LOAD_XIHF64:
3153 return emitAtomicLoadBinary(MI, MBB, SystemZ::XIHF64, 64);
3155 case SystemZ::ATOMIC_LOADW_NRi:
3156 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 0, true);
3157 case SystemZ::ATOMIC_LOADW_NILHi:
3158 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 0, true);
3159 case SystemZ::ATOMIC_LOAD_NRi:
3160 return emitAtomicLoadBinary(MI, MBB, SystemZ::NR, 32, true);
3161 case SystemZ::ATOMIC_LOAD_NILLi:
3162 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL, 32, true);
3163 case SystemZ::ATOMIC_LOAD_NILHi:
3164 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH, 32, true);
3165 case SystemZ::ATOMIC_LOAD_NILFi:
3166 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF, 32, true);
3167 case SystemZ::ATOMIC_LOAD_NGRi:
3168 return emitAtomicLoadBinary(MI, MBB, SystemZ::NGR, 64, true);
3169 case SystemZ::ATOMIC_LOAD_NILL64i:
3170 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILL64, 64, true);
3171 case SystemZ::ATOMIC_LOAD_NILH64i:
3172 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILH64, 64, true);
3173 case SystemZ::ATOMIC_LOAD_NIHL64i:
3174 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHL64, 64, true);
3175 case SystemZ::ATOMIC_LOAD_NIHH64i:
3176 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHH64, 64, true);
3177 case SystemZ::ATOMIC_LOAD_NILF64i:
3178 return emitAtomicLoadBinary(MI, MBB, SystemZ::NILF64, 64, true);
3179 case SystemZ::ATOMIC_LOAD_NIHF64i:
3180 return emitAtomicLoadBinary(MI, MBB, SystemZ::NIHF64, 64, true);
3182 case SystemZ::ATOMIC_LOADW_MIN:
3183 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3184 SystemZ::CCMASK_CMP_LE, 0);
3185 case SystemZ::ATOMIC_LOAD_MIN_32:
3186 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3187 SystemZ::CCMASK_CMP_LE, 32);
3188 case SystemZ::ATOMIC_LOAD_MIN_64:
3189 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
3190 SystemZ::CCMASK_CMP_LE, 64);
3192 case SystemZ::ATOMIC_LOADW_MAX:
3193 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3194 SystemZ::CCMASK_CMP_GE, 0);
3195 case SystemZ::ATOMIC_LOAD_MAX_32:
3196 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CR,
3197 SystemZ::CCMASK_CMP_GE, 32);
3198 case SystemZ::ATOMIC_LOAD_MAX_64:
3199 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CGR,
3200 SystemZ::CCMASK_CMP_GE, 64);
3202 case SystemZ::ATOMIC_LOADW_UMIN:
3203 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3204 SystemZ::CCMASK_CMP_LE, 0);
3205 case SystemZ::ATOMIC_LOAD_UMIN_32:
3206 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3207 SystemZ::CCMASK_CMP_LE, 32);
3208 case SystemZ::ATOMIC_LOAD_UMIN_64:
3209 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
3210 SystemZ::CCMASK_CMP_LE, 64);
3212 case SystemZ::ATOMIC_LOADW_UMAX:
3213 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3214 SystemZ::CCMASK_CMP_GE, 0);
3215 case SystemZ::ATOMIC_LOAD_UMAX_32:
3216 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLR,
3217 SystemZ::CCMASK_CMP_GE, 32);
3218 case SystemZ::ATOMIC_LOAD_UMAX_64:
3219 return emitAtomicLoadMinMax(MI, MBB, SystemZ::CLGR,
3220 SystemZ::CCMASK_CMP_GE, 64);
3222 case SystemZ::ATOMIC_CMP_SWAPW:
3224 case SystemZ::MVCSequence:
3225 case SystemZ::MVCLoop:
3226 return emitMemMemWrapper(MI, MBB, SystemZ::MVC);
3227 case SystemZ::NCSequence:
3228 case SystemZ::NCLoop:
3229 return emitMemMemWrapper(MI, MBB, SystemZ::NC);
3230 case SystemZ::OCSequence:
3231 case SystemZ::OCLoop:
3232 return emitMemMemWrapper(MI, MBB, SystemZ::OC);
3233 case SystemZ::XCSequence:
3234 case SystemZ::XCLoop:
3235 return emitMemMemWrapper(MI, MBB, SystemZ::XC);
3236 case SystemZ::CLCSequence:
3237 case SystemZ::CLCLoop:
3238 return emitMemMemWrapper(MI, MBB, SystemZ::CLC);
3239 case SystemZ::CLSTLoop:
3240 return emitStringWrapper(MI, MBB, SystemZ::CLST);
3241 case SystemZ::MVSTLoop:
3242 return emitStringWrapper(MI, MBB, SystemZ::MVST);
3243 case SystemZ::SRSTLoop:
3244 return emitStringWrapper(MI, MBB, SystemZ::SRST);